CLRX  1
An unofficial OpenCL extensions designed for Radeon GPUs
GPUId.h
Go to the documentation of this file.
1 /*
2  * CLRadeonExtender - Unofficial OpenCL Radeon Extensions Library
3  * Copyright (C) 2014-2018 Mateusz Szpakowski
4  *
5  * This library is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU Lesser General Public
7  * License as published by the Free Software Foundation; either
8  * version 2.1 of the License, or (at your option) any later version.
9  *
10  * This library is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13  * Lesser General Public License for more details.
14  *
15  * You should have received a copy of the GNU Lesser General Public
16  * License along with this library; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
18  */
23 #ifndef __CLRX_GPUID_H__
24 #define __CLRX_GPUID_H__
25 
26 #include <CLRX/Config.h>
27 #include <CLRX/utils/Utilities.h>
28 #include <string>
29 
31 namespace CLRX
32 {
33 
36 {
37 public:
39  GPUIdException() = default;
41  explicit GPUIdException(const std::string& message);
43  virtual ~GPUIdException() noexcept = default;
44 };
45 
46 /*
47  * GPU identification utilities
48  */
49 
51 enum class GPUDeviceType: cxbyte
52 {
53  CAPE_VERDE = 0,
54  PITCAIRN,
55  TAHITI,
56  OLAND,
57  BONAIRE,
58  SPECTRE,
59  SPOOKY,
60  KALINDI,
61  HAINAN,
62  HAWAII,
63  ICELAND,
64  TONGA,
65  MULLINS,
66  FIJI,
67  CARRIZO,
68  DUMMY,
69  GOOSE,
70  HORSE,
71  STONEY,
72  ELLESMERE,
73  BAFFIN,
74  GFX804,
75  GFX900,
76  GFX901,
77  GFX902,
78  GFX903,
79  GFX904,
80  GFX905,
81  GFX906,
82  GFX907,
83  GPUDEVICE_MAX = GFX907,
84 
90  RADEON_R9_290 = HAWAII
91 };
92 
95 {
96  GCN1_0 = 0,
97  GCN1_1,
98  GCN1_2,
99  GCN1_4,
100  GCN1_4_1,
101  GPUARCH_MAX = GCN1_4_1
102 };
103 
105 typedef uint16_t GPUArchMask;
106 
107 // GCN architecture masks (bit represents architecture)
108 enum : GPUArchMask
109 {
110  ARCH_SOUTHERN_ISLANDS = 1,
111  ARCH_SEA_ISLANDS = 2,
112  ARCH_VOLCANIC_ISLANDS = 4,
113  ARCH_HD7X00 = 1,
114  ARCH_RX2X0 = 2,
115  ARCH_RX3X0 = 4,
116  ARCH_RXVEGA = 8,
117  ARCH_VEGA20 = 16,
118  ARCH_GCN_1_0_1 = 0x3,
119  ARCH_GCN_1_1_2 = 0x6,
120  ARCH_GCN_1_1_2_4 = 0x1e,
121  ARCH_GCN_1_2_4 = 0x1c,
122  ARCH_GCN_1_4 = 0x18,
123  ARCH_GCN_ALL = 0xffff
124 };
125 
127 extern GPUDeviceType getGPUDeviceTypeFromName(const char* name);
128 
130 extern const char* getGPUDeviceTypeName(GPUDeviceType deviceType);
131 
133 extern GPUArchitecture getGPUArchitectureFromName(const char* name);
134 
137 
140 
142 extern const char* getGPUArchitectureName(GPUArchitecture architecture);
143 
145 extern bool isThisGPUArchitecture(GPUArchitecture requiredArch, GPUArchitecture thisArch);
146 
147 enum: Flags {
148  REGCOUNT_NO_VCC = 1,
149  REGCOUNT_NO_FLAT = 2,
150  REGCOUNT_NO_XNACK = 4,
151  REGCOUNT_NO_EXTRA = 0xffff
152 };
153 
154 enum: cxuint {
155  REGTYPE_SGPR = 0,
156  REGTYPE_VGPR
157 };
158 
159 enum : Flags
160 {
161  GCN_VCC = 1,
162  GCN_FLAT = 2,
163  GCN_XNACK = 4
164 };
165 
166 enum: Flags {
167  GPUSETUP_TGSIZE_EN = 1,
168  GPUSETUP_SCRATCH_EN = 2
169 };
170 
171 enum: cxuint {
172  MAX_REGTYPES_NUM = 4
173 };
174 
176 extern cxuint getGPUMaxRegistersNum(GPUArchitecture architecture, cxuint regType,
177  Flags flags = 0);
178 
180 extern cxuint getGPUMaxRegsNumByArchMask(GPUArchMask archMask, cxuint regType);
181 
183 extern bool isSpecialSGPRRegister(GPUArchMask archMask, cxuint index);
184 
186 extern void getGPUSetupMinRegistersNum(GPUArchitecture architecture, cxuint dimMask,
187  cxuint userDataNum, Flags flags, cxuint* gprsOut);
188 
190 extern cxuint getDefaultDimMask(GPUArchitecture architecture, uint32_t pgmRSRC2);
191 
193 extern size_t getGPUMaxLocalSize(GPUArchitecture architecture);
194 
196 extern size_t getGPUMaxGDSSize(GPUArchitecture architecture);
197 
199 extern cxuint getGPUExtraRegsNum(GPUArchitecture architecture, cxuint regType,
200  Flags flags);
201 
204 {
205  uint32_t major;
206  uint32_t minor;
207  uint32_t stepping;
208 };
209 
211 extern uint32_t calculatePgmRSrc1(GPUArchitecture arch, cxuint vgprsNum, cxuint sgprsNum,
212  cxuint priority, cxuint floatMode, bool privMode, bool dx10clamp,
213  bool debugMode, bool ieeeMode);
214 
216 extern uint32_t calculatePgmRSrc2(GPUArchitecture arch, bool scratchEn, cxuint userDataNum,
217  bool trapPresent, cxuint dimMask, cxuint defDimValues, bool tgSizeEn,
218  cxuint ldsSize, cxuint exceptions);
219 
220 
223 {
224  AMDCL2 = 0,
225  OPENSOURCE,
226  ROCM
227 };
228 
231  GPUArchVersionTable table);
232 
233 // get GPU device type from architecture version
234 extern GPUDeviceType getGPUDeviceTypeFromArchVersion(cxuint archMajor, cxuint archMinor,
235  cxuint archStepping);
236 
237 };
238 
239 #endif
uint32_t Flags
type for declaring various flags
Definition: Utilities.h:100
first iteration (Radeon HD7000 series)
virtual ~GPUIdException() noexcept=default
destructor
structure helper for AMDGPU architecture version
Definition: GPUId.h:203
AMD OpenCL 2.0 format.
GPUArchitecture getGPUArchitectureFromDeviceType(GPUDeviceType deviceType)
get GPUArchitecture from GPU device type
uint16_t GPUArchMask
GPU architecture mask (one bit represents single GPU architecture)
Definition: GPUId.h:105
GPUArchitecture getGPUArchitectureFromName(const char *name)
get GPU architecture from name
cxuint getDefaultDimMask(GPUArchitecture architecture, uint32_t pgmRSRC2)
get default dimMask from PGMRSRC2
cxuint getGPUMaxRegsNumByArchMask(GPUArchMask archMask, cxuint regType)
get maximum available registers for GPU (type: 0 - scalar, 1 - vector)
GPUArchitecture
GPU architecture.
Definition: GPUId.h:94
GPUId exception class.
Definition: GPUId.h:35
GPUDeviceType getLowestGPUDeviceTypeFromArchitecture(GPUArchitecture arch)
get lowest GPU device for architecture
GFX9 architecture with NN extensions (AMD VEGA 20)
GPUArchVersionTable
ADMGPUArchValues table type.
Definition: GPUId.h:222
bool isSpecialSGPRRegister(GPUArchMask archMask, cxuint index)
get maximum number of scalar register + extra scalar reg (VCC, FLAT_SCRATCH, ...) ...
Configuration header.
void getGPUSetupMinRegistersNum(GPUArchitecture architecture, cxuint dimMask, cxuint userDataNum, Flags flags, cxuint *gprsOut)
get minimal number of required registers
bool isThisGPUArchitecture(GPUArchitecture requiredArch, GPUArchitecture thisArch)
check whether is this GPU architecture
uint32_t calculatePgmRSrc2(GPUArchitecture arch, bool scratchEn, cxuint userDataNum, bool trapPresent, cxuint dimMask, cxuint defDimValues, bool tgSizeEn, cxuint ldsSize, cxuint exceptions)
calculate PGMRSRC2 register value
const char * getGPUDeviceTypeName(GPUDeviceType deviceType)
get GPU device type name
size_t getGPUMaxLocalSize(GPUArchitecture architecture)
get maximum local size for GPU architecture
cxuint getGPUMaxRegistersNum(GPUArchitecture architecture, cxuint regType, Flags flags=0)
get maximum available registers for GPU (type: 0 - scalar, 1 - vector)
uint32_t major
arch major number
Definition: GPUId.h:205
uint32_t stepping
arch stepping number
Definition: GPUId.h:207
unsigned char cxbyte
unsigned byte
Definition: Config.h:229
uint32_t calculatePgmRSrc1(GPUArchitecture arch, cxuint vgprsNum, cxuint sgprsNum, cxuint priority, cxuint floatMode, bool privMode, bool dx10clamp, bool debugMode, bool ieeeMode)
calculate PGMRSRC1 register value
main namespace
Definition: AsmDefs.h:38
GFX9 architecture (AMD RX VEGA)
unsigned int cxuint
unsigned int
Definition: Config.h:237
size_t getGPUMaxGDSSize(GPUArchitecture architecture)
get maximum GDS size for GPU architecture
uint32_t minor
arch minor number
Definition: GPUId.h:206
GPUDeviceType
type of GPU device
Definition: GPUId.h:51
third iteration (Radeon Rx 300 series and Tonga)
ROCm (RadeonOpenCompute) format.
GPUIdException()=default
empty constructor
utilities for other libraries and programs
const char * getGPUArchitectureName(GPUArchitecture architecture)
get GPU architecture name
std::string message
message
Definition: Utilities.h:64
GPUDeviceType getGPUDeviceTypeFromName(const char *name)
get GPU device type from name
exception class
Definition: Utilities.h:61
AMDGPUArchVersion getGPUArchVersion(GPUDeviceType deviceType, GPUArchVersionTable table)
get AMD GPU architecture version for specific device type and driver
cxuint getGPUExtraRegsNum(GPUArchitecture architecture, cxuint regType, Flags flags)
get extra registers (like VCC,FLAT_SCRATCH)
second iteration (Radeon Rx 200 series)