CLRX  1
An unofficial OpenCL extensions designed for Radeon GPUs
Public Member Functions | Public Attributes | List of all members
CLRX::AsmAmdHsaKernelConfig Struct Reference

Asm AMD HSA kernel configuration. More...

#include <AsmFormats.h>

Inheritance diagram for CLRX::AsmAmdHsaKernelConfig:
CLRX::AmdHsaKernelConfig

Public Member Functions

void initialize ()
 
- Public Member Functions inherited from CLRX::AmdHsaKernelConfig
void toLE ()
 

Public Attributes

cxuint dimMask
 mask of dimension (bits: 0 - X, 1 - Y, 2 - Z)
 
cxuint usedVGPRsNum
 number of used VGPRs
 
cxuint usedSGPRsNum
 number of used SGPRs
 
cxbyte userDataNum
 number of user data
 
bool ieeeMode
 IEEE mode.
 
cxbyte floatMode
 float mode
 
cxbyte priority
 priority
 
cxbyte exceptions
 enabled exceptions
 
bool tgSize
 enable TG_SIZE_EN bit
 
bool debugMode
 debug mode
 
bool privilegedMode
 prvileged mode
 
bool dx10Clamp
 DX10 CLAMP mode.
 
- Public Attributes inherited from CLRX::AmdHsaKernelConfig
uint32_t amdCodeVersionMajor
 AMD code version major number.
 
uint32_t amdCodeVersionMinor
 AMD code version minor number.
 
uint16_t amdMachineKind
 architecture kind
 
uint16_t amdMachineMajor
 arch major number
 
uint16_t amdMachineMinor
 arch minor number
 
uint16_t amdMachineStepping
 arch stepping number
 
uint64_t kernelCodeEntryOffset
 kernel relative to this config to kernel code
 
uint64_t kernelCodePrefetchOffset
 kernel code prefetch offset
 
uint64_t kernelCodePrefetchSize
 
uint64_t maxScrachBackingMemorySize
 
uint32_t computePgmRsrc1
 PGMRSRC1 register value.
 
uint32_t computePgmRsrc2
 PGMRSRC2 register value.
 
uint16_t enableSgprRegisterFlags
 bitfield of sg
 
uint16_t enableFeatureFlags
 bitfield of feature flags
 
uint32_t workitemPrivateSegmentSize
 workitem private (scratchbuffer) segment size
 
uint32_t workgroupGroupSegmentSize
 workgroup group segment (local memory) size
 
uint32_t gdsSegmentSize
 GDS segment size.
 
uint64_t kernargSegmentSize
 kernel argument segment size
 
uint32_t workgroupFbarrierCount
 
uint16_t wavefrontSgprCount
 scalar register count per wavefront
 
uint16_t workitemVgprCount
 vector register count per workitem
 
uint16_t reservedVgprFirst
 reserved first vector register
 
uint16_t reservedVgprCount
 reserved vector register count
 
uint16_t reservedSgprFirst
 reserved first scalar register
 
uint16_t reservedSgprCount
 reserved scalar register count
 
uint16_t debugWavefrontPrivateSegmentOffsetSgpr
 
uint16_t debugPrivateSegmentBufferSgpr
 
cxbyte kernargSegmentAlignment
 kernel segment alignment
 
cxbyte groupSegmentAlignment
 group segment alignment
 
cxbyte privateSegmentAlignment
 private segment alignment
 
cxbyte wavefrontSize
 wavefront size
 
uint32_t callConvention
 call convention
 
uint32_t reserved1 [3]
 reserved
 
uint64_t runtimeLoaderKernelSymbol
 
cxbyte controlDirective [128]
 control directives area
 

Detailed Description

Asm AMD HSA kernel configuration.


The documentation for this struct was generated from the following file: