23 #ifndef __CLRX_COMMONS_H__ 24 #define __CLRX_COMMONS_H__ 44 AMDHSAFLAG_USE_DISPATCH_PTR = 2,
47 AMDHSAFLAG_USE_DISPATCH_ID = 16,
48 AMDHSAFLAG_USE_FLAT_SCRATCH_INIT = 32,
50 AMDHSAFLAG_USE_GRID_WORKGROUP_COUNT_BIT = 7,
55 AMDHSAFLAG_USE_WAVE32 = (1U<<10),
57 AMDHSAFLAG_USE_ORDERED_APPEND_GDS = 1,
60 AMDHSAFLAG_USE_DYNAMIC_CALL_STACK = 16,
76 uint64_t kernelCodePrefetchSize;
77 uint64_t maxScrachBackingMemorySize;
86 uint32_t workgroupFbarrierCount;
93 uint16_t debugWavefrontPrivateSegmentOffsetSgpr;
94 uint16_t debugPrivateSegmentBufferSgpr;
101 uint64_t runtimeLoaderKernelSymbol;
106 SLEV(amdCodeVersionMajor, amdCodeVersionMajor);
107 SLEV(amdCodeVersionMinor, amdCodeVersionMinor);
108 SLEV(amdMachineKind, amdMachineKind);
109 SLEV(amdMachineMajor, amdMachineMajor);
110 SLEV(amdMachineMinor, amdMachineMinor);
111 SLEV(amdMachineStepping, amdMachineStepping);
112 SLEV(kernelCodeEntryOffset, kernelCodeEntryOffset);
113 SLEV(kernelCodePrefetchOffset, kernelCodePrefetchOffset);
114 SLEV(kernelCodePrefetchSize, kernelCodePrefetchSize);
115 SLEV(maxScrachBackingMemorySize, maxScrachBackingMemorySize);
116 SLEV(computePgmRsrc1, computePgmRsrc1);
117 SLEV(computePgmRsrc2, computePgmRsrc2);
118 SLEV(enableSgprRegisterFlags, enableSgprRegisterFlags);
119 SLEV(enableFeatureFlags, enableFeatureFlags);
120 SLEV(workitemPrivateSegmentSize, workitemPrivateSegmentSize);
121 SLEV(workgroupGroupSegmentSize, workgroupGroupSegmentSize);
122 SLEV(gdsSegmentSize, gdsSegmentSize);
123 SLEV(kernargSegmentSize, kernargSegmentSize);
124 SLEV(workgroupFbarrierCount, workgroupFbarrierCount);
125 SLEV(wavefrontSgprCount, wavefrontSgprCount);
126 SLEV(workitemVgprCount, workitemVgprCount);
127 SLEV(reservedVgprFirst, reservedVgprFirst);
128 SLEV(reservedVgprCount, reservedVgprCount);
129 SLEV(reservedSgprFirst, reservedSgprFirst);
130 SLEV(reservedSgprCount, reservedSgprCount);
131 SLEV(debugWavefrontPrivateSegmentOffsetSgpr,
132 debugWavefrontPrivateSegmentOffsetSgpr);
133 SLEV(debugPrivateSegmentBufferSgpr, debugPrivateSegmentBufferSgpr);
134 SLEV(callConvention, callConvention);
135 SLEV(runtimeLoaderKernelSymbol, runtimeLoaderKernelSymbol);
140 ASM_DIMMASK_SECONDFIELD_MASK = (7<<3),
141 ASM_DIMMASK_SECONDFIELD_SHIFT = 3U,
142 ASM_DIMMASK_SECONDFIELD_ENABLED = 0x100U
uint16_t amdMachineStepping
arch stepping number
Definition: Commons.h:73
uint32_t workitemPrivateSegmentSize
workitem private (scratchbuffer) segment size
Definition: Commons.h:82
uint16_t amdMachineMinor
arch minor number
Definition: Commons.h:72
use 64-bit pointers
Definition: Commons.h:59
uint64_t kernelCodePrefetchOffset
kernel code prefetch offset
Definition: Commons.h:75
uint32_t workgroupGroupSegmentSize
workgroup group segment (local memory) size
Definition: Commons.h:83
relocation that get high 32-bit of value
Definition: Commons.h:39
cxbyte privateSegmentAlignment
private segment alignment
Definition: Commons.h:97
AMD HSA kernel configuration structure.
Definition: Commons.h:66
cxbyte kernargSegmentAlignment
kernel segment alignment
Definition: Commons.h:95
uint32_t gdsSegmentSize
GDS segment size.
Definition: Commons.h:84
uint16_t reservedSgprCount
reserved scalar register count
Definition: Commons.h:92
cxuint RelocType
relocation type
Definition: Commons.h:33
use kernel argument segment pointer
Definition: Commons.h:46
use ordered append gds
Definition: Commons.h:58
cxbyte groupSegmentAlignment
group segment alignment
Definition: Commons.h:96
uint16_t enableFeatureFlags
bitfield of feature flags
Definition: Commons.h:81
uint32_t computePgmRsrc1
PGMRSRC1 register value.
Definition: Commons.h:78
xnack enabled
Definition: Commons.h:62
uint32_t computePgmRsrc2
PGMRSRC2 register value.
Definition: Commons.h:79
unsigned char cxbyte
unsigned byte
Definition: Config.h:229
use workgroup count for Y dim
Definition: Commons.h:52
main namespace
Definition: AsmDefs.h:38
relocation that get low 32-bit of value
Definition: Commons.h:38
unsigned int cxuint
unsigned int
Definition: Config.h:237
use private segment buffer
Definition: Commons.h:43
uint32_t callConvention
call convention
Definition: Commons.h:99
uint16_t reservedSgprFirst
reserved first scalar register
Definition: Commons.h:91
use private segment size
Definition: Commons.h:49
inlines for accessing memory words in LittleEndian and unaligned
relocation that get value
Definition: Commons.h:37
uint16_t wavefrontSgprCount
scalar register count per wavefront
Definition: Commons.h:87
cxbyte controlDirective[128]
control directives area
Definition: Commons.h:102
uint16_t enableSgprRegisterFlags
bitfield of sg
Definition: Commons.h:80
uint16_t workitemVgprCount
vector register count per workitem
Definition: Commons.h:88
use workgroup count for X dim
Definition: Commons.h:51
uint16_t amdMachineKind
architecture kind
Definition: Commons.h:70
use queue pointer
Definition: Commons.h:45
uint32_t amdCodeVersionMinor
AMD code version minor number.
Definition: Commons.h:69
void SLEV(uint8_t &r, uint8_t v)
save from/to little endian value
Definition: MemAccess.h:246
uint32_t reserved1[3]
reserved
Definition: Commons.h:100
use workgroup count for Z dim
Definition: Commons.h:53
uint16_t amdMachineMajor
arch major number
Definition: Commons.h:71
uint16_t reservedVgprFirst
reserved first vector register
Definition: Commons.h:89
cxbyte wavefrontSize
wavefront size
Definition: Commons.h:98
uint64_t kernargSegmentSize
kernel argument segment size
Definition: Commons.h:85
uint64_t kernelCodeEntryOffset
kernel relative to this config to kernel code
Definition: Commons.h:74
uint16_t reservedVgprCount
reserved vector register count
Definition: Commons.h:90
debug enabled
Definition: Commons.h:61
uint32_t amdCodeVersionMajor
AMD code version major number.
Definition: Commons.h:68