Changeset 3109 in CLRX
 Timestamp:
 May 31, 2017, 7:59:06 AM (17 months ago)
 Location:
 CLRadeonExtender/trunk
 Files:

 3 edited
Legend:
 Unmodified
 Added
 Removed

CLRadeonExtender/trunk/CLRX/amdasm/AsmDefs.h
r3108 r3109 69 69 GCNTGT_SMEMOFFSETVEGA, 70 70 GCNTGT_SMEMOFFSET2, // RXVEGA first soffset 71 GCNTGT_INSTOFFSET 71 GCNTGT_INSTOFFSET, 72 GCNTGT_INSTOFFSET_S 72 73 }; 73 74 … … 486 487 GCNFIELD_FLAT_VDSTLAST, 487 488 GCNFIELD_DPPSDWA_SRC0, 488 GCNFIELD_DPPSDWA_SSRC0 489 GCNFIELD_DPPSDWA_SSRC0, 490 GCNFIELD_FLAT_SADDR 489 491 }; 490 492 
CLRadeonExtender/trunk/amdasm/GCNAssembler.cpp
r3108 r3109 3505 3505 } 3506 3506 const bool isGCN14 = (arch & ARCH_RXVEGA)!=0; 3507 const cxuint flatMode = (gcnInsn.mode & GCN_FLAT_MODEMASK); 3507 3508 bool good = true; 3508 3509 RegRange vaddrReg(0, 0); 3509 3510 RegRange vdstReg(0, 0); 3510 3511 RegRange vdataReg(0, 0); 3512 RegRange saddrReg(0, 0); 3511 3513 GCNAssembler* gcnAsm = static_cast<GCNAssembler*>(asmr.isaAssembler); 3512 3514 … … 3514 3516 const char* vdstPlace = nullptr; 3515 3517 3518 bool vaddrOff = false; 3516 3519 const cxuint dregsNum = ((gcnInsn.mode&GCN_DSIZE_MASK)>>GCN_SHIFT2)+1; 3517 3520 if ((gcnInsn.mode & GCN_FLAT_ADST) == 0) … … 3524 3527 if (!skipRequiredComma(asmr, linePtr)) 3525 3528 return false; 3526 gcnAsm>setCurrentRVU(1); 3527 good &= parseVRegRange(asmr, linePtr, vaddrReg, 2, GCNFIELD_FLAT_ADDR, true, 3529 skipSpacesToEnd(linePtr, end); 3530 if (flatMode == GCN_FLAT_SCRATCH && linePtr+3<end && 3531 toLower(linePtr[0])=='o' && toLower(linePtr[1])=='f' && 3532 toLower(linePtr[2])=='f' && (linePtr+3==end  !isAlnum(linePtr[3]))) 3533 { // if off 3534 vaddrOff = true; 3535 linePtr+=3; 3536 } 3537 else 3538 { 3539 gcnAsm>setCurrentRVU(1); 3540 good &= parseVRegRange(asmr, linePtr, vaddrReg, 3541 (flatMode != GCN_FLAT_SCRATCH ? 2 : 1), GCNFIELD_FLAT_ADDR, true, 3542 INSTROP_SYMREGRANGEINSTROP_READ); 3543 } 3544 } 3545 else 3546 { 3547 skipSpacesToEnd(linePtr, end); 3548 if (flatMode == GCN_FLAT_SCRATCH && linePtr+3<end && 3549 toLower(linePtr[0])=='o' && toLower(linePtr[1])=='f' && 3550 toLower(linePtr[2])=='f' && (linePtr+3==end  !isAlnum(linePtr[3]))) 3551 { // if off 3552 vaddrOff = true; 3553 linePtr+=3; 3554 } 3555 else 3556 { 3557 gcnAsm>setCurrentRVU(1); 3558 good &= parseVRegRange(asmr, linePtr, vaddrReg, 3559 (flatMode != GCN_FLAT_SCRATCH ? 2 : 1), GCNFIELD_FLAT_ADDR, true, 3528 3560 INSTROP_SYMREGRANGEINSTROP_READ); 3529 } 3530 else 3531 { 3532 gcnAsm>setCurrentRVU(1); 3533 good &= parseVRegRange(asmr, linePtr, vaddrReg, 2, GCNFIELD_FLAT_ADDR, true, 3534 INSTROP_SYMREGRANGEINSTROP_READ); 3561 } 3535 3562 if ((gcnInsn.mode & GCN_FLAT_NODST) == 0) 3536 3563 { … … 3553 3580 true, INSTROP_SYMREGRANGEINSTROP_READ); 3554 3581 } 3582 3583 bool saddrOff = false; 3584 if (flatMode != 0) 3585 { // SADDR 3586 if (!skipRequiredComma(asmr, linePtr)) 3587 return false; 3588 skipSpacesToEnd(linePtr, end); 3589 if (flatMode != 0 && linePtr+3<end && 3590 toLower(linePtr[0])=='o' && toLower(linePtr[1])=='f' && 3591 toLower(linePtr[2])=='f' && (linePtr+3==end  !isAlnum(linePtr[3]))) 3592 { // if off 3593 saddrOff = true; 3594 linePtr+=3; 3595 } 3596 else 3597 { 3598 gcnAsm>setCurrentRVU(3); 3599 good &= parseSRegRange(asmr, linePtr, saddrReg, arch, 3600 (flatMode==GCN_FLAT_SCRATCH ? 1 : 2), GCNFIELD_FLAT_SADDR, true, 3601 INSTROP_SYMREGRANGEINSTROP_READ); 3602 } 3603 } 3604 3605 if (flatMode == GCN_FLAT_SCRATCH && !saddrOff && !vaddrOff) 3606 { 3607 asmr.printError(instrPlace, "Only one of VADDR and SADDR can be set in " 3608 "SCRATCH mode"); 3609 good = false; 3610 } 3611 3612 if (saddrOff) 3613 saddrReg.start = 0xff; 3614 if (vaddrOff) 3615 vaddrReg.start = 0xff; 3555 3616 3556 3617 uint16_t instOffset = 0; … … 3583 3644 { 3584 3645 if (parseModImm(asmr, linePtr, instOffset, &instOffsetExpr, "inst_offset", 3585 12,WS_UNSIGNED))3646 flatMode!=0 ? 13 : 12, flatMode!=0 ? WS_BOTH : WS_UNSIGNED)) 3586 3647 { 3587 3648 if (haveInstOffset) … … 3637 3698 3638 3699 if (instOffsetExpr!=nullptr) 3639 instOffsetExpr>setTarget(AsmExprTarget(GCNTGT_INSTOFFSET, asmr.currentSection, 3700 instOffsetExpr>setTarget(AsmExprTarget(flatMode!=0 ? 3701 GCNTGT_INSTOFFSET_S : GCNTGT_INSTOFFSET, asmr.currentSection, 3640 3702 output.size())); 3641 3703 3642 3704 uint32_t words[2]; 3643 3705 SLEV(words[0], 0xdc000000U  (haveGlc ? 0x10000 : 0)  (haveSlc ? 0x20000: 0)  3644 (uint32_t(gcnInsn.code1)<<18)  (haveLds ? 0x2000U : 0)  instOffset); 3645 SLEV(words[1], (vaddrReg.start&0xff)  (uint32_t(vdataReg.start&0xff)<<8)  3646 (haveTfehaveNv ? (1U<<23) : 0)  (uint32_t(vdstReg.start&0xff)<<24)); 3706 (uint32_t(gcnInsn.code1)<<18)  (haveLds ? 0x2000U : 0)  instOffset  3707 (uint32_t(flatMode)<<14)); 3708 SLEV(words[1], (vaddrReg.bstart()&0xff)  (uint32_t(vdataReg.bstart()&0xff)<<8)  3709 (haveTfehaveNv ? (1U<<23) : 0)  (uint32_t(vdstReg.bstart()&0xff)<<24)  3710 (uint32_t(saddrReg.bstart())<<16)); 3647 3711 3648 3712 output.insert(output.end(), reinterpret_cast<cxbyte*>(words), … … 3937 4001 sectionData[offset+1] = (sectionData[offset+1]&0xf0)  ((value&0xf00)>>8); 3938 4002 printWarningForRange(12, value, sourcePos, WS_UNSIGNED); 4003 return true; 4004 case GCNTGT_INSTOFFSET_S: 4005 if (sectionId != ASMSECT_ABS) 4006 { 4007 printError(sourcePos, "Relative value is illegal in offset expressions"); 4008 return false; 4009 } 4010 sectionData[offset] = value; 4011 sectionData[offset+1] = (sectionData[offset+1]&0xe0)  4012 ((value&0x1f00)>>8); 4013 printWarningForRange(13, value, sourcePos, WS_BOTH); 3939 4014 return true; 3940 4015 default: 
CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc14.cpp
r3108 r3109 658 658 { "flat_load_short_d16_hi " "v47, v[187:188] glc slc nv\n", 659 659 0xdc970000U, 0x2f8000bbU, true, true, "" }, 660 /* FLAT SCRATCH encoding */ 661 { "scratch_load_ubyte v47, off, s49 glc slc\n", 662 0xdc434000U, 0x2f3100ffU, true, true, "" }, 663 { "scratch_load_ubyte v47, v187, off glc slc\n", 664 0xdc434000U, 0x2fff00bbU, true, true, "" }, 665 { "scratch_load_ubyte v47, v187, off inst_offset:1043 glc slc\n", 666 0xdc434413U, 0x2fff00bbU, true, true, "" }, 667 { "scratch_load_ubyte v47, v187, off inst_offset:zz glc slc\nzz=1043\n", 668 0xdc434413U, 0x2fff00bbU, true, true, "" }, 669 { "scratch_load_ubyte v47, v187, off inst_offset:3053 glc slc\n", 670 0xdc435413U, 0x2fff00bbU, true, true, "" }, 671 { "scratch_load_ubyte v47, v187, off inst_offset:zz glc slc\nzz=3053\n", 672 0xdc435413U, 0x2fff00bbU, true, true, "" }, 673 { "scratch_load_ubyte v47, v187, off inst_offset:4096 glc slc\n", 674 0xdc435000U, 0x2fff00bbU, true, true, "" }, 675 { "scratch_load_ubyte v47, v187, off inst_offset:zzx glc slc\nzzx=4096\n", 676 0xdc435000U, 0x2fff00bbU, true, true, "" }, 677 /* FLAT SCRATCH instructions */ 678 { "scratch_load_sbyte v47, off, s49 glc slc\n", 679 0xdc474000U, 0x2f3100ffU, true, true, "" }, 680 { "scratch_load_ushort v47, off, s49 glc slc\n", 681 0xdc4b4000U, 0x2f3100ffU, true, true, "" }, 682 { "scratch_load_sshort v47, off, s49 glc slc\n", 683 0xdc4f4000U, 0x2f3100ffU, true, true, "" }, 684 { "scratch_load_dword v47, off, s49 glc slc\n", 685 0xdc534000U, 0x2f3100ffU, true, true, "" }, 686 { "scratch_load_dwordx2 v[47:48], off, s49 glc slc\n", 687 0xdc574000U, 0x2f3100ffU, true, true, "" }, 688 { "scratch_load_dwordx3 v[47:49], off, s49 glc slc\n", 689 0xdc5b4000U, 0x2f3100ffU, true, true, "" }, 690 { "scratch_load_dwordx4 v[47:50], off, s49 glc slc\n", 691 0xdc5f4000U, 0x2f3100ffU, true, true, "" }, 692 { "scratch_store_byte off, v65, s49 glc slc\n", 693 0xdc634000U, 0x003141ffU, true, true, "" }, 694 { "scratch_store_byte_d16_hi off, v65, s49 glc slc\n", 695 0xdc674000U, 0x003141ffU, true, true, "" }, 696 { "scratch_store_short off, v65, s49 glc slc\n", 697 0xdc6b4000U, 0x003141ffU, true, true, "" }, 698 { "scratch_store_short_d16_hi off, v65, s49 glc slc\n", 699 0xdc6f4000U, 0x003141ffU, true, true, "" }, 700 { "scratch_store_dword off, v65, s49 glc slc\n", 701 0xdc734000U, 0x003141ffU, true, true, "" }, 702 { "scratch_store_dwordx2 off, v[65:66], s49 glc slc\n", 703 0xdc774000U, 0x003141ffU, true, true, "" }, 704 { "scratch_store_dwordx3 off, v[65:67], s49 glc slc\n", 705 0xdc7b4000U, 0x003141ffU, true, true, "" }, 706 { "scratch_store_dwordx4 off, v[65:68], s49 glc slc\n", 707 0xdc7f4000U, 0x003141ffU, true, true, "" }, 708 { "scratch_load_ubyte_d16 v47, off, s49 glc slc\n", 709 0xdc834000U, 0x2f3100ffU, true, true, "" }, 710 { "scratch_load_ubyte_d16_hi v47, off, s49 glc slc\n", 711 0xdc874000U, 0x2f3100ffU, true, true, "" }, 712 { "scratch_load_sbyte_d16 v47, off, s49 glc slc\n", 713 0xdc8b4000U, 0x2f3100ffU, true, true, "" }, 714 { "scratch_load_sbyte_d16_hi v47, off, s49 glc slc\n", 715 0xdc8f4000U, 0x2f3100ffU, true, true, "" }, 716 { "scratch_load_short_d16 v47, off, s49 glc slc\n", 717 0xdc934000U, 0x2f3100ffU, true, true, "" }, 718 { "scratch_load_short_d16_hi v47, off, s49 glc slc\n", 719 0xdc974000U, 0x2f3100ffU, true, true, "" }, 660 720 { nullptr, 0, 0, false, false, 0 } 661 721 };
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