Changeset 3569 in CLRX
 Timestamp:
 Dec 29, 2017, 8:17:29 AM (3 months ago)
 Location:
 CLRadeonExtender/trunk/doc
 Files:

 4 edited
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CLRadeonExtender/trunk/doc/AmdAbi.md
r3568 r3569 63 63 Second const buffer (id=1) holds arguments aligned to 4 dwords. 64 64 65 Global pointers holds vector offset (64bit for 64bit binary) to thememory.65 Global pointers holds vector offset (64bit for 64bit binary) to memory. 66 66 Local pointers holds its offset in bytes (1 dword). 67 67 
CLRadeonExtender/trunk/doc/AmdCl2Abi.md
r3568 r3569 3 3 This chapter describes how kernel gets its argument, how access to constant data. Because 4 4 Kernel setup is AMD HSA configuration, hence we recommend to refer to ROCmABI documentation 5 to get information about kernel setup and kernel arguments passing. Now an assembler have5 to get information about kernel setup and kernel arguments passing. Now, an assembler have 6 6 all the AMD HSA configuration's pseudoops to do it. 7 7 
CLRadeonExtender/trunk/doc/GcnInstrsVop1.md
r3568 r3569 969 969 Opcode VOP3A: 422 (0x1a6) for GCN 1.0/1.1 970 970 Syntax: V_LOG_CLAMP_F32 VDST, SRC0 971 Description: Approximate logarithm of thebase 2 from floating point value SRC0 with971 Description: Approximate logarithm of base 2 from floating point value SRC0 with 972 972 clamping infinities to MAX_FLOAT. Result is stored in VDST. 973 973 If SRC0 is negative then store NaN to VDST. This instruction doesn't handle denormalized … … 993 993 Opcode VOP3A: 384 (0x180) for GCN 1.2 994 994 Syntax: V_LOG_F16 VDST, SRC0 995 Description: Approximate logarithm of thebase 2 from half floating point value SRC0,995 Description: Approximate logarithm of base 2 from half floating point value SRC0, 996 996 and store result to VDST. If SRC0 is negative then store NaN to VDST. 997 997 Operation: … … 1011 1011 Opcode VOP3A: 423 (0x1a7) for GCN 1.0/1.1; 353 (0x161) for GCN 1.2 1012 1012 Syntax: V_LOG_F32 VDST, SRC0 1013 Description: Approximate logarithm of base the2 from floating point value SRC0, and store1013 Description: Approximate logarithm of base 2 from floating point value SRC0, and store 1014 1014 result to VDST. If SRC0 is negative then store NaN to VDST. 1015 1015 This instruction doesn't handle denormalized values regardless FLOAT MODE register setup. … … 1030 1030 Opcode VOP3A: 453 (0x1c5) for GCN 1.1; 396 (0x18c) for GCN 1.2 1031 1031 Syntax: V_LOG_LEGACY_F32 VDST, SRC0 1032 Description: Approximate logarithm of thebase 2 from floating point value SRC0, and store1032 Description: Approximate logarithm of base 2 from floating point value SRC0, and store 1033 1033 result to VDST. If SRC0 is negative then store NaN to VDST. 1034 1034 This instruction doesn't handle denormalized values regardless FLOAT MODE register setup. 
CLRadeonExtender/trunk/doc/GcnOperands.md
r3568 r3569 70 70 ### Operand syntax 71 71 72 THeSingle operands can be given by their name: `s0`, `v54`.72 Single operands can be given by their name: `s0`, `v54`. 73 73 CLRX assembler accepts the syntax with 74 74 brackets: `s[0]`, `s[z]`, `v[66]`. In many instructions operands are … … 79 79 The names of the registers are caseinsensitive. 80 80 81 The constant values are automatically resolved if an expression have already value.81 Constant values are automatically resolved if an expression have already value. 82 82 The 1/(2*PI), 1.0, 2.0 and other floating point constant values will be 83 83 resolved if that accurate floating point value will be given.
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