Changeset 3569 in CLRX


Ignore:
Timestamp:
Dec 29, 2017, 8:17:29 AM (9 months ago)
Author:
matszpk
Message:

CLRadeonExtender: CLRXDocs: small updates.

Location:
CLRadeonExtender/trunk/doc
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/doc/AmdAbi.md

    r3568 r3569  
    6363Second const buffer (id=1) holds arguments aligned to 4 dwords.
    6464
    65 Global pointers holds vector offset (64-bit for 64-bit binary) to the memory.
     65Global pointers holds vector offset (64-bit for 64-bit binary) to memory.
    6666Local pointers holds its offset in bytes (1 dword).
    6767
  • CLRadeonExtender/trunk/doc/AmdCl2Abi.md

    r3568 r3569  
    33This chapter describes how kernel gets its argument, how access to constant data. Because
    44Kernel setup is AMD HSA configuration, hence we recommend to refer to ROCm-ABI documentation
    5 to get information about kernel setup and kernel arguments passing. Now an assembler have
     5to get information about kernel setup and kernel arguments passing. Now, an assembler have
    66all the AMD HSA configuration's pseudo-ops to do it.
    77
  • CLRadeonExtender/trunk/doc/GcnInstrsVop1.md

    r3568 r3569  
    969969Opcode VOP3A: 422 (0x1a6) for GCN 1.0/1.1 
    970970Syntax: V_LOG_CLAMP_F32 VDST, SRC0 
    971 Description: Approximate logarithm of the base 2 from floating point value SRC0 with
     971Description: Approximate logarithm of base 2 from floating point value SRC0 with
    972972clamping infinities to -MAX_FLOAT. Result is stored in VDST.
    973973If SRC0 is negative then store -NaN to VDST. This instruction doesn't handle denormalized
     
    993993Opcode VOP3A: 384 (0x180) for GCN 1.2 
    994994Syntax: V_LOG_F16 VDST, SRC0 
    995 Description: Approximate logarithm of the base 2 from half floating point value SRC0,
     995Description: Approximate logarithm of base 2 from half floating point value SRC0,
    996996and store result to VDST. If SRC0 is negative then store -NaN to VDST. 
    997997Operation: 
     
    10111011Opcode VOP3A: 423 (0x1a7) for GCN 1.0/1.1; 353 (0x161) for GCN 1.2 
    10121012Syntax: V_LOG_F32 VDST, SRC0 
    1013 Description: Approximate logarithm of base the 2 from floating point value SRC0, and store
     1013Description: Approximate logarithm of base 2 from floating point value SRC0, and store
    10141014result to VDST. If SRC0 is negative then store -NaN to VDST.
    10151015This instruction doesn't handle denormalized values regardless FLOAT MODE register setup. 
     
    10301030Opcode VOP3A: 453 (0x1c5) for GCN 1.1; 396 (0x18c) for GCN 1.2 
    10311031Syntax: V_LOG_LEGACY_F32 VDST, SRC0 
    1032 Description: Approximate logarithm of the base 2 from floating point value SRC0, and store
     1032Description: Approximate logarithm of base 2 from floating point value SRC0, and store
    10331033result to VDST. If SRC0 is negative then store -NaN to VDST.
    10341034This instruction doesn't handle denormalized values regardless FLOAT MODE register setup.
  • CLRadeonExtender/trunk/doc/GcnOperands.md

    r3568 r3569  
    7070### Operand syntax
    7171
    72 THe Single operands can be given by their name: `s0`, `v54`.
     72Single operands can be given by their name: `s0`, `v54`.
    7373CLRX assembler accepts the syntax with
    7474brackets: `s[0]`, `s[z]`, `v[66]`. In many instructions operands are
     
    7979The names of the registers are case-insensitive.
    8080
    81 The constant values are automatically resolved if an expression have already value.
     81Constant values are automatically resolved if an expression have already value.
    8282The 1/(2*PI), 1.0, -2.0 and other floating point constant values will be
    8383resolved if that accurate floating point value will be given.
Note: See TracChangeset for help on using the changeset viewer.