Changeset 3894 in CLRX


Ignore:
Timestamp:
Mar 12, 2018, 5:10:13 PM (4 months ago)
Author:
matszpk
Message:

CLRadeonExtender: Renumber the testcases in the comments.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/tests/amdasm/AsmRegAllocCase2.cpp

    r3892 r3894  
    2727const AsmSSADataCase ssaDataTestCases2Tbl[] =
    2828{
    29     {   // 27 - conflicts inside routines
     29    {   // 0 - conflicts inside routines
    3030        R"ffDXD(.regvar sa:s:8, va:v:8
    3131        s_mov_b32 sa[2], s4
     
    189189        true, ""
    190190    },
    191     {  // 28 - res second point cache test 1
     191    {  // 1 - res second point cache test 1
    192192        R"ffDXD(.regvar sa:s:8, va:v:8, xa:s:8
    193193        s_mov_b32 sa[2], s4
     
    384384        true, ""
    385385    },
    386     {   // 29 - cache test 2: loop
     386    {   // 2 - cache test 2: loop
    387387        R"ffDXD(.regvar sa:s:8, va:v:8, xa:s:8
    388388        s_mov_b32 sa[2], s4
     
    529529    },
    530530#if 0
    531     {   // 30 - routine with loop
     531    {   // 3 - routine with loop
    532532        R"ffDXD(.regvar sa:s:8, va:v:8, xa:s:8
    533533        s_mov_b32 sa[2], s4
     
    665665    }
    666666#endif
    667     {   // 31 - routine with condition
     667    {   // 4 - routine with condition
    668668        R"ffDXD(.regvar sa:s:8, va:v:8, xa:s:8
    669669        s_mov_b32 sa[2], s4
     
    789789        true, ""
    790790    },
    791     {   // 32 - two routines with common code
     791    {   // 5 - two routines with common code
    792792        R"ffDXD(.regvar sa:s:8, va:v:8, xa:s:8
    793793        s_mov_b32 sa[2], s4
     
    936936        true, ""
    937937    },
    938     {   // 33 - simple call, more complex routine (reduce with reads)
     938    {   // 6 - simple call, more complex routine (reduce with reads)
    939939        R"ffDXD(.regvar sa:s:8, va:v:8
    940940        s_mov_b32 sa[2], s4
     
    10371037        true, ""
    10381038    },
    1039     {   // 34 - retssa tests
     1039    {   // 7 - retssa tests
    10401040        R"ffDXD(.regvar sa:s:8, va:v:8
    10411041        s_mov_b32 sa[2], s4
     
    12491249        true, ""
    12501250    },
    1251     {   // 35 - retssa tests
     1251    {   // 8 - retssa tests
    12521252        R"ffDXD(.regvar sa:s:8, va:v:8
    12531253        s_mov_b32 sa[2], s4
     
    14091409        true, ""
    14101410    },
    1411     {   // 35 - retssa tests
     1411    {   // 9 - retssa tests
    14121412        R"ffDXD(.regvar sa:s:10, va:v:8
    14131413        s_mov_b32 sa[2], s4
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