Changeset 4110 in CLRX


Ignore:
Timestamp:
May 8, 2018, 9:38:23 AM (12 days ago)
Author:
matszpk
Message:

CLRadeonExtender: AsmRegAlloc?: Replace allSSAs by allLivenesses (set of pointers to Liveness) and remove obsolete regType and lvIndex from applyToLiveCallTime.

Location:
CLRadeonExtender/trunk/amdasm
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/amdasm/AsmRegAlloc.cpp

    r4109 r4110  
    698698}
    699699
    700 static void getLivenessIndex(const AsmSingleVReg& svreg, size_t ssaIdIdx,
    701         const AsmRegAllocator::SSAInfo& ssaInfo,
    702         const VarIndexMap* vregIndexMaps, size_t regTypesNum, const cxuint* regRanges,
    703         cxuint& regType, size_t& lvIndex)
     700static Liveness& getLiveness(const AsmSingleVReg& svreg, size_t ssaIdIdx,
     701        const AsmRegAllocator::SSAInfo& ssaInfo, std::vector<Liveness>* livenesses,
     702        const VarIndexMap* vregIndexMaps, size_t regTypesNum, const cxuint* regRanges)
    704703{
    705704    size_t ssaId;
     
    715714        ssaId = ssaInfo.ssaIdLast;
    716715   
    717     regType = getRegType(regTypesNum, regRanges, svreg); // regtype
     716    cxuint regType = getRegType(regTypesNum, regRanges, svreg); // regtype
    718717    const VarIndexMap& vregIndexMap = vregIndexMaps[regType];
    719718    const std::vector<size_t>& ssaIdIndices = vregIndexMap.find(svreg)->second;
    720     /*ARDOut << "lvn[" << regType << "][" << ssaIdIndices[ssaId] << "]. ssaIdIdx: " <<
     719    ARDOut << "lvn[" << regType << "][" << ssaIdIndices[ssaId] << "]. ssaIdIdx: " <<
    721720            ssaIdIdx << ". ssaId: " << ssaId << ". svreg: " << svreg.regVar << ":" <<
    722             svreg.index << "\n";*/
    723     //return livenesses[regType][ssaIdIndices[ssaId]];
    724     lvIndex = ssaIdIndices[ssaId];
    725 }
    726 
    727 static inline Liveness& getLiveness(const AsmSingleVReg& svreg, size_t ssaIdIdx,
    728         const AsmRegAllocator::SSAInfo& ssaInfo, std::vector<Liveness>* livenesses,
     721            svreg.index << "\n";
     722    return livenesses[regType][ssaIdIndices[ssaId]];
     723}
     724
     725static Liveness& getLiveness2(const AsmSingleVReg& svreg,
     726        size_t ssaId, std::vector<Liveness>* livenesses,
    729727        const VarIndexMap* vregIndexMaps, size_t regTypesNum, const cxuint* regRanges)
    730728{
    731     cxuint regType;
    732     size_t lvIndex;
    733     getLivenessIndex(svreg, ssaIdIdx, ssaInfo, vregIndexMaps, regTypesNum, regRanges,
    734             regType, lvIndex);
    735     return livenesses[regType][lvIndex];
    736 }
    737 
    738 static void getLiveness2Index(const AsmSingleVReg& svreg, size_t ssaId,
    739         const VarIndexMap* vregIndexMaps, size_t regTypesNum, const cxuint* regRanges,
    740         cxuint& regType, size_t& lvIndex)
    741 {
    742     regType = getRegType(regTypesNum, regRanges, svreg); // regtype
     729    cxuint regType = getRegType(regTypesNum, regRanges, svreg); // regtype
    743730    const VarIndexMap& vregIndexMap = vregIndexMaps[regType];
    744731    const std::vector<size_t>& ssaIdIndices = vregIndexMap.find(svreg)->second;
    745     /*ARDOut << "lvn[" << regType << "][" << ssaIdIndices[ssaId] << "]. ssaId: " <<
    746             ssaId << ". svreg: " << svreg.regVar << ":" << svreg.index << "\n";*/
    747     lvIndex = ssaIdIndices[ssaId];
    748 }
     732    ARDOut << "lvn[" << regType << "][" << ssaIdIndices[ssaId] << "]. ssaId: " <<
     733            ssaId << ". svreg: " << svreg.regVar << ":" << svreg.index << "\n";
     734    return livenesses[regType][ssaIdIndices[ssaId]];
     735}
     736
    749737
    750738static void applyToLiveCallTime(size_t block, Liveness& lv,
    751             cxuint lvRType /* lv register type */, size_t lvIndex,
    752739            const std::vector<CodeBlock>& codeBlocks, const RoutineLvMap& routineMap,
    753740            const std::unordered_map<size_t, size_t>& callLiveTimesMap)
     
    761748            if (next.isCall)
    762749            {
    763                 const RoutineDataLv& rdata = routineMap.find(next.block)->second;
    764                 if (rdata.allSSAs[lvRType].find(lvIndex) == rdata.allSSAs[lvRType].end())
    765                     // add only if vreg not present in routine
     750                const auto& allLvs= routineMap.find(next.block)->second.allLivenesses;
     751                if (allLvs.find(&lv) == allLvs.end())
     752                    // add callLiveTime only if vreg not present in routine
    766753                    lv.insert(callLiveTime, callLiveTime+1);
    767754                callLiveTime--;
     
    773760            const std::vector<CodeBlock>& codeBlocks, const RoutineLvMap& routineMap,
    774761            const std::unordered_map<size_t, size_t>& callLiveTimesMap,
    775             size_t startBlock, const AsmSingleVReg& svreg, Liveness& lv,
    776             cxuint lvRType /* lv register type */, size_t lvIndex)
     762            size_t startBlock, const AsmSingleVReg& svreg, Liveness& lv)
    777763{
    778764    std::deque<FlowStackEntry3> flowStack;
     
    804790                lv.insert(cbStart, cblock.end);
    805791               
    806                 applyToLiveCallTime(entry.blockIndex, lv, lvRType, lvIndex,
    807                         codeBlocks, routineMap, callLiveTimesMap);
     792                applyToLiveCallTime(entry.blockIndex, lv, codeBlocks, routineMap,
     793                        callLiveTimesMap);
    808794            }
    809795            else
     
    850836    if (skipLastBlock)
    851837        --flitEnd; // before last element
    852     cxuint lvRegType;
    853     size_t lvIndex;
    854     getLiveness2Index(svreg, ssaId, vregIndexMaps, regTypesNum, regRanges,
    855                       lvRegType, lvIndex);
    856     Liveness& lv = livenesses[lvRegType][lvIndex];
     838    Liveness& lv = getLiveness2(svreg, ssaId, livenesses, vregIndexMaps,
     839                    regTypesNum, regRanges);
    857840   
    858841    if (flitEnd != flowStack.begin())
     
    914897            if (!entry.inSubroutines)
    915898                fillUpInsideRoutine(visited, codeBlocks, routineMap, callLiveTimesMap,
    916                             blockStart, svreg, lv, lvRegType, lvIndex);
     899                            blockStart, svreg, lv);
    917900            else
    918901                // fill up next block in path (do not fill start block)
    919902                fillUpInsideRoutine(visited, codeBlocks, routineMap, callLiveTimesMap,
    920                         blockStart+1, svreg, lv, lvRegType, lvIndex);
     903                        blockStart+1, svreg, lv);
    921904            rjStack.pop();
    922905        }
     
    926909    const CodeBlock& lastBlk = codeBlocks[flit->blockIndex];
    927910   
    928     applyToLiveCallTime(flit->blockIndex, lv, lvRegType, lvIndex,
    929                 codeBlocks, routineMap, callLiveTimesMap);
     911    applyToLiveCallTime(flit->blockIndex, lv, codeBlocks, routineMap, callLiveTimesMap);
    930912   
    931913    auto sinfoIt = lastBlk.ssaInfoMap.find(svreg);
     
    942924    {
    943925        const CodeBlock& cblock = codeBlocks[flit->blockIndex];
    944         applyToLiveCallTime(flit->blockIndex, lv, lvRegType, lvIndex, codeBlocks,
     926        applyToLiveCallTime(flit->blockIndex, lv, codeBlocks,
    945927                        routineMap, callLiveTimesMap);
    946928        lv.insert(cblock.start, cblock.end);
     
    14171399{
    14181400    dest.rbwSSAIdMap.insert(src.rbwSSAIdMap.begin(), src.rbwSSAIdMap.end());
    1419     for (size_t i = 0; i < MAX_REGTYPES_NUM; i++)
    1420         dest.allSSAs[i].insert(src.allSSAs[i].begin(), src.allSSAs[i].end());
     1401    dest.allLivenesses.insert(src.allLivenesses.begin(), src.allLivenesses.end());
    14211402   
    14221403    // join source lastAccessMap with curSVRegMap
     
    14411422        const RoutineLvMap& routineMap, RoutineDataLv& rdata,
    14421423        size_t routineBlock, const VarIndexMap* vregIndexMaps,
    1443         size_t regTypesNum, const cxuint* regRanges)
     1424        std::vector<Liveness>* livenesses, size_t regTypesNum, const cxuint* regRanges)
    14441425{
    14451426    std::deque<FlowStackEntry4> flowStack;
     
    14941475                    // add SSA indices to allSSAs
    14951476                    if (sinfo.readBeforeWrite)
    1496                         rdata.allSSAs[regType].insert(ssaIdIndices[sinfo.ssaIdBefore]);
     1477                        rdata.allLivenesses.insert(livenesses[regType].data() +
     1478                                    ssaIdIndices[sinfo.ssaIdBefore]);
    14971479                    if (sinfo.ssaIdChange != 0)
    14981480                    {
    1499                         rdata.allSSAs[regType].insert(ssaIdIndices[sinfo.ssaIdFirst]);
     1481                        rdata.allLivenesses.insert(livenesses[regType].data() +
     1482                                    ssaIdIndices[sinfo.ssaIdFirst]);
    15001483                        for (size_t i = 1; i < sinfo.ssaIdChange; i++)
    1501                             rdata.allSSAs[regType].insert(ssaIdIndices[sinfo.ssaId+i]);
    1502                         rdata.allSSAs[regType].insert(ssaIdIndices[sinfo.ssaIdLast]);
     1484                            rdata.allLivenesses.insert(livenesses[regType].data() +
     1485                                        ssaIdIndices[sinfo.ssaId+i]);
     1486                        rdata.allLivenesses.insert(livenesses[regType].data() +
     1487                                    ssaIdIndices[sinfo.ssaIdLast]);
    15031488                    }
    15041489                }
     
    18281813            if (res.second)
    18291814                createRoutineDataLv(codeBlocks, routineMap, res.first->second,
    1830                         entry.blockIndex, vregIndexMaps, regTypesNum, regRanges);
     1815                        entry.blockIndex, vregIndexMaps, livenesses,
     1816                        regTypesNum, regRanges);
    18311817            else
    18321818            {
     
    18881874                            }
    18891875                       
    1890                         for (cxuint r = 0; r < regTypesNum; r++)
    1891                             for(size_t lvIndex: rdata.allSSAs[r])
    1892                                 livenesses[r][lvIndex].insert(callLiveTime, callLiveTime+1);
     1876                        for(Liveness* lv: rdata.allLivenesses)
     1877                            lv->insert(callLiveTime, callLiveTime+1);
    18931878                        callLiveTime--;
    18941879                    }
  • CLRadeonExtender/trunk/amdasm/AsmRegAlloc.h

    r4106 r4110  
    223223};
    224224
     225class Liveness;
     226
    225227// Routine data for createLivenesses - holds svreg read before writes and
    226228// last access of the svregs
     
    230232    // holds all vreg SSA's used in routine (used while creating call point)
    231233    // includes subroutines called in this routines
    232     std::unordered_set<size_t> allSSAs[MAX_REGTYPES_NUM];
     234    std::unordered_set<Liveness*> allLivenesses;
    233235    // key - svreg, value - list of the last codeblocks where is svreg
    234236    LastAccessMap lastAccessMap;
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