Changes between Version 10 and Version 11 of GcnInstrsSmem


Ignore:
Timestamp:
11/24/17 21:00:36 (6 years ago)
Author:
trac
Comment:

--

Legend:

Unmodified
Added
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  • GcnInstrsSmem

    v10 v11  
    6161<td>32-52</td>
    6262<td>OFFSET</td>
    63 <td>Unsigned 21-bit byte offset or SGPR number (byte offset) (GCN 1.4)</td>
     63<td>Signed 21-bit byte offset or SGPR number (byte offset) (GCN 1.4)</td>
    6464</tr>
    6565<tr>
    … …  
    7070</tbody>
    7171</table>
    72 <p>Value of the IMM determines meaning of the OFFSET field:</p>
     72<p>Value of the IMM determines meaning of the OFFSET field (GCN 1.2):</p>
    7373<ul>
    7474<li>IMM=1 - OFFSET holds a byte offset to SBASE.</li>
    7575<li>IMM=0 - OFFSET holds number of SGPR that holds byte offset to SBASE.</li>
    7676</ul>
    77 <p>For S_LOAD_DWORD* instructions, 2 SBASE SGPRs holds an base 64-bit address.
     77<p>Value of the IMM and SOE determines encoding of OFFSET and SGPR offset (GCN 1.4):</p>
     78<table>
     79<thead>
     80<tr>
     81<th>IMM</th>
     82<th>SOE</th>
     83<th>Address</th>
     84<th>Syntax</th>
     85</tr>
     86</thead>
     87<tbody>
     88<tr>
     89<td>0</td>
     90<td>0</td>
     91<td>SGPR[base] + SGPR[OFFSET]</td>
     92<td></td>
     93</tr>
     94<tr>
     95<td>0</td>
     96<td>1</td>
     97<td>SGPR[base] + SGPR[SOFFSET]</td>
     98<td></td>
     99</tr>
     100<tr>
     101<td>1</td>
     102<td>0</td>
     103<td>SGPR[base] + OFFSET</td>
     104<td></td>
     105</tr>
     106<tr>
     107<td>1</td>
     108<td>1</td>
     109<td>SGPR[base] + OFFSET + SGPR[SOFFSET]</td>
     110<td></td>
     111</tr>
     112</tbody>
     113</table>
     114<p>For S_LOAD_DWORD* instructions, 2 SBASE SGPRs holds a base 64-bit address.
    78115For S_BUFFER_LOAD_DWORD* instructions, 4 SBASE SGPRs holds a
    79116buffer descriptor. In this case, SBASE must be a multipla of 2.
    … …  
    87124<li>LGKM_CNT incremented by two for every fetch of two or more Dwords</li>
    88125</ul>
     126<p>Instruction syntax: INSTRUCTION SDATA, SBASE(2,4), OFFSET|SGPR [MODIFIERS]</p>
     127<p>Modifiers can be supplied in any order. Modifiers list: GLC, NV (GCN 1.4),
     128OFFSET:OFFSET (GCN 1.4).</p>
    89129<p>NOTE: Between setting third dword from buffer resource and S_BUFFER_* instruction
    90130is required least one instruction (vector or scalar) due to delay.</p>
    … …  
    131171</tr>
    132172<tr>
     173<td>5 (0x5)</td>
     174<td></td>
     175<td>✓</td>
     176<td>S_SCRATCH_LOAD_DWORD</td>
     177</tr>
     178<tr>
     179<td>6 (0x6)</td>
     180<td></td>
     181<td>✓</td>
     182<td>S_SCRATCH_LOAD_DWORDX2</td>
     183</tr>
     184<tr>
     185<td>7 (0x7)</td>
     186<td></td>
     187<td>✓</td>
     188<td>S_SCRATCH_LOAD_DWORDX4</td>
     189</tr>
     190<tr>
    133191<td>8 (0x8)</td>
    134192<td>✓</td>
    … …  
    179237</tr>
    180238<tr>
     239<td>21 (0x15)</td>
     240<td></td>
     241<td>✓</td>
     242<td>S_SCRATCH_STORE_DWORD</td>
     243</tr>
     244<tr>
     245<td>22 (0x16)</td>
     246<td></td>
     247<td>✓</td>
     248<td>S_SCRATCH_STORE_DWORDX2</td>
     249</tr>
     250<tr>
     251<td>23 (0x17)</td>
     252<td></td>
     253<td>✓</td>
     254<td>S_SCRATCH_STORE_DWORDX4</td>
     255</tr>
     256<tr>
    181257<td>24 (0x18)</td>
    182258<td>✓</td>
    … …  
    191267</tr>
    192268<tr>
    193 <td>27 (0x1a)</td>
     269<td>26 (0x1a)</td>
    194270<td>✓</td>
    195271<td>✓</td>