Changes between Version 1 and Version 2 of GcnInstrsSop1


Ignore:
Timestamp:
11/15/15 14:00:20 (8 years ago)
Author:
trac
Comment:

--

Legend:

Unmodified
Added
Removed
Modified

  • GcnInstrsSop1

    v1 v2  
    321321<h3>Instruction set</h3>
    322322<p>Alphabetically sorted instruction list:</p>
    323 <h3>S_BREV_B32</h3>
     323<h4>S_BCNT0_I32_B32</h4>
     324<p>Opcode: 13 (0xd) for GCN 1.0/1.1; 10 (0xa) for GCN 1.2<br />
     325Syntax: S_BCNT0_I32_B32 SDST, SSRC0<br />
     326Description: Count zero bits in SSRC0 and store result to SDST.
     327If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.<br />
     328<code>SDST = 0
     329for (UINT8 i = 0; i &lt; 32; i++)
     330    SDST += ((1U&lt;&lt;i) &amp; SSRC0) == 0
     331SCC = SDST!=0</code></p>
     332<h4>S_BCNT0_I32_B64</h4>
     333<p>Opcode: 14 (0xd) for GCN 1.0/1.1; 11 (0xb) for GCN 1.2<br />
     334Syntax: S_BCNT0_I32_B64 SDST, SSRC0(2)<br />
     335Description: Count zero bits in SSRC0 and store result to SDST.
     336If result is non-zero, store 1 to SCC, otherwise store 0 to SCC. SSRC0 is 64-bit.<br />
     337<code>SDST = 0
     338for (UINT8 i = 0; i &lt; 64; i++)
     339    SDST += ((1ULL&lt;&lt;i) &amp; SSRC0) == 0
     340SCC = SDST!=0</code></p>
     341<h4>S_BCNT1_I32_B32</h4>
     342<p>Opcode: 15 (0xf) for GCN 1.0/1.1; 12 (0xc) for GCN 1.2<br />
     343Syntax: S_BCNT1_I32_B65 SDST, SSRC0<br />
     344Description: Count one bits in SSRC0 and store result to SDST.
     345If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.<br />
     346<code>SDST = 0
     347for (UINT8 i = 0; i &lt; 32; i++)
     348    SDST += ((1U&lt;&lt;i) &amp; SSRC0) != 0
     349SCC = SDST!=0</code></p>
     350<h4>S_BCNT1_I32_B64</h4>
     351<p>Opcode: 16 (0x10) for GCN 1.0/1.1; 13 (0xd) for GCN 1.2<br />
     352Syntax: S_BCNT1_I32_B64 SDST, SSRC0(2)<br />
     353Description: Count one bits in SSRC0 and store result to SDST.
     354If result is non-zero, store 1 to SCC, otherwise store 0 to SCC. SSRC0 is 64-bit.<br />
     355<code>SDST = 0
     356for (UINT8 i = 0; i &lt; 64; i++)
     357    SDST += ((1ULL&lt;&lt;i) &amp; SSRC0) != 0
     358SCC = SDST!=0</code></p>
     359<h4>S_BREV_B32</h4>
    324360<p>Opcode: 11 (0xb) for GCN 1.0/1.1; 8 (0x8) for GCN 1.2<br />
    325361Syntax: S_BREV_B32 SDST, SSRC0<br />
    326362Description: Reverse bits in SSRC0 and store result to SDST. SCC is not changed.<br />
    327363<code>SDST = REVBIT(SSRC0)</code></p>
    328 <h3>S_BREV_B64</h3>
     364<h4>S_BREV_B64</h4>
    329365<p>Opcode: 12 (0xc) for GCN 1.0/1.1; 9 (0x9) for GCN 1.2<br />
    330366Syntax: S_BREV_B64 SDST(2), SSRC0(2)<br />
    … …  
    332368SDST and SSRC0 are 64-bit.<br />
    333369<code>SDST = REVBIT(SSRC0)</code></p>
    334 <h3>S_CMOV_B32</h3>
     370<h4>S_CMOV_B32</h4>
    335371<p>Opcode: 5 (0x5) for GCN 1.0/1.1; 2 (0x2) for GCN 1.2<br />
    336372Syntax: S_CMOV_B32 SDST, SSRC0<br />
    … …  
    339375Operation:<br />
    340376<code>SDST = SCC ? SSRC0 : SDST</code></p>
    341 <h3>S_CMOV_B64</h3>
     377<h4>S_CMOV_B64</h4>
    342378<p>Opcode: 6 (0x6) for GCN 1.0/1.1; 3 (0x3) for GCN 1.2<br />
    343379Syntax: S_CMOV_B64 SDST(2), SSRC0(2)<br />
    … …  
    346382Operation:<br />
    347383<code>SDST = SCC ? SSRC0 : SDST</code></p>
    348 <h3>S_MOV_B32</h3>
     384<h4>S_FF0_I32_B32</h4>
     385<p>Opcode: 17 (0x11) for GCN 1.0/1.1; 14 (0xe) for GCN 1.2<br />
     386Syntax: S_FF0_I32_B32 SDST, SSRC0<br />
     387Description: Find first zero bit in SSRC0. If found store number of bit to SDST,
     388otherwise set SDST to -1.<br />
     389<code>SDST = -1
     390for (UINT8 i = 0; i &lt; 32; i++)
     391    if ((1U&lt;&lt;i) &amp; SSRC0) == 0)
     392    { SDST = i; break; }</code></p>
     393<h4>S_FF0_I32_B64</h4>
     394<p>Opcode: 18 (0x12) for GCN 1.0/1.1; 15 (0xf) for GCN 1.2<br />
     395Syntax: S_FF0_I32_B64 SDST, SSRC0(2)<br />
     396Description: Find first zero bit in SSRC0. If found store number of bit to SDST,
     397otherwise set SDST to -1. SSRC0 is 64-bit.<br />
     398<code>SDST = -1
     399for (UINT8 i = 0; i &lt; 64; i++)
     400    if ((1ULL&lt;&lt;i) &amp; SSRC0) == 0)
     401    { SDST = i; break; }</code></p>
     402<h4>S_FF1_I32_B32</h4>
     403<p>Opcode: 19 (0x13) for GCN 1.0/1.1; 16 (0x10) for GCN 1.2<br />
     404Syntax: S_FF1_I32_B32 SDST, SSRC0<br />
     405Description: Find first one bit in SSRC0. If found store number of bit to SDST,
     406otherwise set SDST to -1.<br />
     407<code>SDST = -1
     408for (UINT8 i = 0; i &lt; 32; i++)
     409    if ((1U&lt;&lt;i) &amp; SSRC0) != 0)
     410    { SDST = i; break; }</code></p>
     411<h4>S_FF1_I32_B64</h4>
     412<p>Opcode: 20 (0x14) for GCN 1.0/1.1; 17 (0x11) for GCN 1.2<br />
     413Syntax: S_FF0_I32_B64 SDST, SSRC0(2)<br />
     414Description: Find first one bit in SSRC0. If found store number of bit to SDST,
     415otherwise set SDST to -1. SSRC0 is 64-bit.<br />
     416<code>SDST = -1
     417for (UINT8 i = 0; i &lt; 64; i++)
     418    if ((1ULL&lt;&lt;i) &amp; SSRC0) != 0)
     419    { SDST = i; break; }</code></p>
     420<h4>S_FLBIT_I32_B32</h4>
     421<p>Opcode: 21 (0x15) for GCN 1.0/1.1; 18 (0x12) for GCN 1.2<br />
     422Syntax: S_FLBIT_I32_B32 SDST, SSRC0<br />
     423Description: Find last one bit in SSRC0. If found store number of skipped bits to SDST,
     424otherwise set SDST to -1.<br />
     425<code>SDST = -1
     426for (INT8 i = 31; i &gt;= 0; i++)
     427    if ((1U&lt;&lt;i) &amp; SSRC0) != 0)
     428    { SDST = 31-i; break; }</code></p>
     429<h4>S_FLBIT_I32_B64</h4>
     430<p>Opcode: 22 (0x16) for GCN 1.0/1.1; 19 (0x13) for GCN 1.2<br />
     431Syntax: S_FLBIT_I32_B64 SDST, SSRC0(2)<br />
     432Description: Find last one bit in SSRC0. If found store number of skipped bits to SDST,
     433otherwise set SDST to -1.  SSRC0 is 64-bit<br />
     434<code>SDST = -1
     435for (INT8 i = 63; i &gt;= 0; i++)
     436    if ((1ULL&lt;&lt;i) &amp; SSRC0) != 0)
     437    { SDST = 63-i; break; }</code></p>
     438<h4>S_MOV_B32</h4>
    349439<p>Opcode: 3 (0x3) for GCN 1.0/1.1; 0 (0x0) for GCN 1.2<br />
    350440Syntax: S_MOV_B32 SDST, SSRC0<br />
    … …  
    352442Operation:<br />
    353443<code>SDST = SSRC0</code></p>
    354 <h3>S_MOV_B64</h3>
     444<h4>S_MOV_B64</h4>
    355445<p>Opcode: 4 (0x4) for GCN 1.0/1.1; 1 (0x1) for GCN 1.2<br />
    356446Syntax: S_MOV_B64 SDST(2), SSRC0(2)<br />
    … …  
    358448Operation:<br />
    359449<code>SDST = SSRC0</code></p>
    360 <h3>S_MOV_B32</h3>
     450<h4>S_MOV_B32</h4>
    361451<p>Opcode: 3 (0x3) for GCN 1.0/1.1; 0 (0x0) for GCN 1.2<br />
    362452Syntax: S_MOV_B32 SDST, SSRC0<br />
    … …  
    364454Operation:<br />
    365455<code>SDST = SSRC0</code></p>
    366 <h3>S_NOT_B32</h3>
     456<h4>S_NOT_B32</h4>
    367457<p>Opcode: 7 (0x7) for GCN 1.0/1.1; 4 (0x4) for GCN 1.2<br />
    368458Syntax: S_NOT_B32 SDST, SSRC0<br />
    … …  
    372462<code>SDST = ~SSRC0
    373463SCC = SDST!=0</code></p>
    374 <h3>S_NOT_B64</h3>
     464<h4>S_NOT_B64</h4>
    375465<p>Opcode: 8 (0x8) for GCN 1.0/1.1; 5 (0x5) for GCN 1.2<br />
    376466Syntax: S_NOT_B64 SDST(2), SSRC0(2)<br />
    … …  
    381471<code>SDST = ~SSRC0
    382472SCC = SDST!=0</code></p>
    383 <h3>S_WQM_B32</h3>
     473<h4>S_WQM_B32</h4>
    384474<p>Opcode: 9 (0x9) for GCN 1.0/1.1; 6 (0x6) for GCN 1.2<br />
    385475Syntax: S_WQM_B32 SDST, SSRC0<br />
    … …  
    393483SDST = temp
    394484SCC = SDST!=0</code></p>
    395 <h3>S_WQM_B64</h3>
     485<h4>S_WQM_B64</h4>
    396486<p>Opcode: 10 (0xa) for GCN 1.0/1.1; 7 (0x7) for GCN 1.2<br />
    397487Syntax: S_WQM_B64 SDST(2), SSRC0(2)<br />