Changes between Version 3 and Version 4 of GcnInstrsSop1
- Timestamp:
- 11/15/15 23:00:23 (8 years ago)
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GcnInstrsSop1
v3 v4 422 422 Operation:<br /> 423 423 <code>SDST = REVBIT(SSRC0)</code></p> 424 <h4>S_CBRANCH_JOIN</h4> 425 <p>Opcode: 50 (0x32) for GCN 1.0/1.1; 46 (0x2e) for GCN 1.2<br /> 426 Syntax: S_CBRANCH_JOIN SSRC0<br /> 427 Description: Join conditional branch that begin from S_CBRANCH_*_FORK. If control stack 428 pointer have same value as SSRC0 then do nothing and jump to next instruction, otherwise 429 pop from control stack value program counter and EXEC value.<br /> 430 Operation:<br /> 431 <code>if (CSP==SSRC0) 432 PC += 4 433 else 434 { 435 CSP-- 436 EXEC = SGPR[CSP*4:CSP*4+1] 437 PC = SGPRS[CSP*4+2:CSP*4+3] 438 }</code></p> 424 439 <h4>S_CMOV_B32</h4> 425 440 <p>Opcode: 5 (0x5) for GCN 1.0/1.1; 2 (0x2) for GCN 1.2<br /> … … 542 557 Operation:<br /> 543 558 <code>SDST = SSRC0</code></p> 559 <h4>S_MOVRELD_B32</h4> 560 <p>Opcode: 48 (0x30) for GCN 1.0/1.1; 44 (0x2c) for GCN 1.2<br /> 561 Syntax: S_MOVRELD_B32 SDST, SSRC0<br /> 562 Description: Store value from SSRC0 to SGPR[SDST_NUMBER+M0 : SDST_NUMBER+M0+1]. 563 SDST_NUMBER is number of SDST register.<br /> 564 Operation:<br /> 565 <code>SGPR[SDST_NUMBER + M0] = SSRC0</code></p> 566 <h4>S_MOVRELD_B64</h4> 567 <p>Opcode: 49 (0x31) for GCN 1.0/1.1; 45 (0x2d) for GCN 1.2<br /> 568 Syntax: S_MOVRELD_B64 SDST, SSRC0<br /> 569 Description: Store value from SSRC0 to SGPR[SDST_NUMBER+M0]. 570 SDST_NUMBER is number of SDST register. SDST and SSRC0 are 64-bit<br /> 571 Operation:<br /> 572 <code>SGPR[SDST_NUMBER + M0 : SDST_NUMBER + M0 + 1] = SSRC0</code></p> 544 573 <h4>S_MOVRELS_B32</h4> 545 574 <p>Opcode: 46 (0x2e) for GCN 1.0/1.1; 42 (0x2a) for GCN 1.2<br /> 546 575 Syntax: S_MOVRELS_B32 SDST, SSRC0<br /> 547 576 Description: Store value from SGPR[M0+SSRC0_NUMBER] to SDST. 548 SSRC0_NUMBER is number of S DSTregister.<br />577 SSRC0_NUMBER is number of SSRC0 register.<br /> 549 578 Operation:<br /> 550 579 <code>SDST = SGPR[SSRC0_NUMBER + M0]</code></p> 551 580 <h4>S_MOVRELS_B64</h4> 552 581 <p>Opcode: 47 (0x2f) for GCN 1.0/1.1; 43 (0x2b) for GCN 1.2<br /> 553 Syntax: S_MOVRELS_B64 SDST , SSRC0<br />554 Description: Store 64-bit value from SGPR[M0+SSRC0_NUMBER :M0+SSRC0_NUMBER+1] to SDST.555 SSRC0_NUMBER is number of S DST register.<br />556 Operation:<br /> 557 <code>SDST = SGPR[SSRC0_NUMBER + M0 ]</code></p>582 Syntax: S_MOVRELS_B64 SDST(2), SSRC0(2)<br /> 583 Description: Store 64-bit value from SGPR[M0+SSRC0_NUMBER : M0+SSRC0_NUMBER+1] to SDST. 584 SSRC0_NUMBER is number of SSRC0 register. SDST and SSRC0 are 64-bit.<br /> 585 Operation:<br /> 586 <code>SDST = SGPR[SSRC0_NUMBER + M0 : SSRC0_NUMBER + M0 + 1]</code></p> 558 587 <h4>S_NOT_B32</h4> 559 588 <p>Opcode: 7 (0x7) for GCN 1.0/1.1; 4 (0x4) for GCN 1.2<br />