Changes between Version 10 and Version 11 of GcnInstrsSop2
- Timestamp:
- 11/21/15 20:00:18 (8 years ago)
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GcnInstrsSop2
v10 v11 351 351 <p>Opcode: 34 (0x22) for GCN 1.0/1.1; 32 (0x20) for GCN 1.2<br /> 352 352 Syntax: S_ASHR_I32 SDST, SSRC0, SSRC1<br /> 353 Description: Arithmetic shift toright SSRC0 by (SSRC1&31) bits and store result into SDST.353 Description: Arithmetic shift right SSRC0 by (SSRC1&31) bits and store result into SDST. 354 354 If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br /> 355 355 Operation:<br /> … … 359 359 <p>Opcode: 35 (0x23) for GCN 1.0/1.1; 33 (0x21) for GCN 1.2<br /> 360 360 Syntax: S_ASHR_I64 SDST(2), SSRC0(2), SSRC1<br /> 361 Description: Arithmetic Shift toright SSRC0 by (SSRC1&63) bits and store result into SDST.361 Description: Arithmetic Shift right SSRC0 by (SSRC1&63) bits and store result into SDST. 362 362 If result is non-zero store 1 to SCC, otherwise store 0 to SCC. SDST, SSRC0 are 64-bit, 363 363 SSRC1 is 32 bit.<br /> … … 489 489 <p>Opcode: 30 (0x1e) for GCN 1.0/1.1; 28 (0x1c) for GCN 1.2<br /> 490 490 Syntax: S_LSHL_B32 SDST, SSRC0, SSRC1<br /> 491 Description: Shift toleft SSRC0 by (SSRC1&31) bits and store result into SDST.491 Description: Shift left SSRC0 by (SSRC1&31) bits and store result into SDST. 492 492 If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br /> 493 493 Operation:<br /> … … 497 497 <p>Opcode: 31 (0x1f) for GCN 1.0/1.1; 29 (0x1d) for GCN 1.2<br /> 498 498 Syntax: S_LSHL_B64 SDST(2), SSRC0(2), SSRC1<br /> 499 Description: Shift toleft SSRC0 by (SSRC1&63) bits and store result into SDST.499 Description: Shift left SSRC0 by (SSRC1&63) bits and store result into SDST. 500 500 If result is non-zero store 1 to SCC, otherwise store 0 to SCC. SDST, SSRC0 are 64-bit, 501 501 SSRC1 is 32 bit.<br /> … … 506 506 <p>Opcode: 32 (0x20) for GCN 1.0/1.1; 30 (0x1e) for GCN 1.2<br /> 507 507 Syntax: S_LSHR_B32 SDST, SSRC0, SSRC1<br /> 508 Description: Shift toright SSRC0 by (SSRC1&31) bits and store result into SDST.508 Description: Shift right SSRC0 by (SSRC1&31) bits and store result into SDST. 509 509 If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br /> 510 510 Operation:<br /> … … 514 514 <p>Opcode: 33 (0x21) for GCN 1.0/1.1; 31 (0x1f) for GCN 1.2<br /> 515 515 Syntax: S_LSHR_B64 SDST(2), SSRC0(2), SSRC1<br /> 516 Description: Shift toright SSRC0 by (SSRC1&63) bits and store result into SDST.516 Description: Shift right SSRC0 by (SSRC1&63) bits and store result into SDST. 517 517 If result is non-zero store 1 to SCC, otherwise store 0 to SCC. SDST, SSRC0 are 64-bit, 518 518 SSRC1 is 32 bit.<br />