Changes between Version 3 and Version 4 of GcnInstrsSopp
- Timestamp:
- 11/17/15 23:00:19 (8 years ago)
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GcnInstrsSopp
v3 v4 306 306 Operation:<br /> 307 307 <code>PC = VCC==0 ? RELADDR : PC+4</code></p> 308 <h4>S_DECPERFLEVEL</h4> 309 <p>Opcode: 21 (0x15)<br /> 310 Syntax: S_DECPERFLEVEL SIMM16<br /> 311 Description: Decrement performance counter specified in SIMM16&15 by 1.<br /> 312 <code>PERFCNT[SIMM16 & 15]--</code></p> 308 313 <h4>S_ENDPGM</h4> 309 314 <p>Opcode: 1 (0x1)<br /> 310 315 Syntax: S_ENDPGM<br /> 311 316 Description: End program.</p> 317 <h4>S_ICACHE_INV</h4> 318 <p>Opcode: 19 (0x13)<br /> 319 Syntax: S_ICACHE_INV<br /> 320 Description: Invalidate entire L1 instruction cache.</p> 321 <h4>S_INCPERFLEVEL</h4> 322 <p>Opcode: 20 (0x14)<br /> 323 Syntax: S_INCPERFLEVEL SIMM16<br /> 324 Description: Increment performance counter specified in SIMM16&15 by 1.<br /> 325 <code>PERFCNT[SIMM16 & 15]++</code></p> 312 326 <h4>S_NOP</h4> 313 327 <p>Opcode: 0 (0x0)<br /> … … 345 359 Operation:<br /> 346 360 <code>HALT = SIMM16&1</code></p> 361 <h4>S_SETKILL</h4> 362 <p>Opcode: 11 (0xb) only GCN 1.1/1.2<br /> 363 Syntax: S_SETKILL SIMM16<br /> 364 Description: Store SIMM16&1 to KILL.<br /> 365 Operation:<br /> 366 <code>KILL = SIMM16&1</code></p> 347 367 <h4>S_SETPRIO</h4> 348 368 <p>Opcode: 15 (0xf)<br /> … … 355 375 Syntax: S_SLEEP SIMM16<br /> 356 376 Description: Sleep approximately by (SIMM16&0x7)*64 cycles.</p> 377 <h4>S_TRAP</h4> 378 <p>Opcode: 18 (0x12)<br /> 379 Syntax: S_TRAP SIMM16<br /> 380 Description: Enter the trap handler.</p> 381 <h4>S_TTRACEDATA</h4> 382 <p>Opcode: 22 (0x16)<br /> 383 Syntax: S_TTRACEDATA<br /> 384 Description: Send M0 as user data to thread-trace.</p> 357 385 <h4>S_WAITCNT</h4> 358 386 <p>Opcode: 12 (0xc)<br />