| 1074 | <h4>V_CEIL_F32</h4> |
| 1075 | <p>Opcode VOP1: 34 (0x22) for GCN 1.0/1.1; 29 (0x1d) for GCN 1.2<br /> |
| 1076 | Opcode VOP3A: 418 (0x1a2) for GCN 1.0/1.1; 349 (0x15d) for GCN 1.2<br /> |
| 1077 | Syntax: V_CEIL_F32 VDST, SRC0<br /> |
| 1078 | Description: Truncate floating point valu from SRC0 with rounding to positive infinity |
| 1079 | (ceilling), and store result to VDST. Implemented by flooring. |
| 1080 | If SRC0 is infinity or NaN then copy SRC0 to VDST.<br /> |
| 1081 | Operation: |
| 1082 | <code>FLOAT F = FLOOR(ASFLOAT(SRC0)) |
| 1083 | if (ASFLOAT(SRC0) > 0.0 && ASFLOAT(SRC0) != F) |
| 1084 | F += 1.0 |
| 1085 | VDST = F</code></p> |
| 1250 | <h4>V_CVT_U32_F64</h4> |
| 1251 | <p>Opcode VOP1: 21 (0x15)<br /> |
| 1252 | Opcode VOP3A: 405 (0x195) for GCN 1.0/1.1; 341 (0x155) for GCN 1.2<br /> |
| 1253 | Syntax: V_CVT_U32_F64 VDST, SRC0(2)<br /> |
| 1254 | Description: Convert 64-bit floating point value from SRC0 to unsigned 32-bit integer, and |
| 1255 | store result to VDST. Conversion uses rounding to zero. If value is higher than |
| 1256 | maximal integer then store MAX_UINT32 to VDST. |
| 1257 | If input value is NaN then store 0 to VDST.<br /> |
| 1258 | Operation:<br /> |
| 1259 | <code>VDST = 0 |
| 1260 | if (ABS(ASDOUBLE(SRC0))!=NAN) |
| 1261 | VDST = (UINT32)MIN(RNDTZINT(ASDOUBLE(SRC0)), 4294967295.0)</code></p> |
| 1262 | <h4>V_FLOOR_F32</h4> |
| 1263 | <p>Opcode VOP1: 37 (0x25) for GCN 1.0/1.1; 31 (0x1f) for GCN 1.2<br /> |
| 1264 | Opcode VOP3A: 421 (0x1a5) for GCN 1.0/1.1; 351 (0x15f) for GCN 1.2<br /> |
| 1265 | Syntax: V_FLOOR_F32 VDST, SRC0<br /> |
| 1266 | Description: Truncate floating point valu from SRC0 with rounding to positive infinity |
| 1267 | (flooring), and store result to VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST.<br /> |
| 1268 | Operation: |
| 1269 | <code>VDST = FLOOR(ASFLOAT(SRC0))</code></p> |
| 1270 | <h4>V_FRACT_F32</h4> |
| 1271 | <p>Opcode VOP1: 32 (0x20) for GCN 1.0/1.1; 27 (0x1b) for GCN 1.2<br /> |
| 1272 | Opcode VOP3A: 416 (0x1a0) for GCN 1.0/1.1; 347 (0x15b) for GCN 1.2<br /> |
| 1273 | Syntax: V_FRACT VDST, SRC0<br /> |
| 1274 | Description: Get fractional from floating point value SRC0 and store it to VDST. |
| 1275 | Fractional will be computed by subtracting floor(SRC0) from SRC0. |
| 1276 | If SRC0 is infinity or NaN then NaN with proper sign is stored to VDST.<br /> |
| 1277 | Operation:<br /> |
| 1278 | <code>FLOAT SF = ASFLOAT(SRC0) |
| 1279 | if (ABS(SF)!=NAN && SF!=-INF && SF!=INF) |
| 1280 | VDST = SF - FLOOR(ASFLOAT(SF)) |
| 1281 | else |
| 1282 | VDST = NAN * SIGN(SF)</code></p> |
| 1313 | <h4>V_RNDNE_F32</h4> |
| 1314 | <p>Opcode VOP1: 35 (0x23) for GCN 1.0/1.1; 30 (0x1e) for GCN 1.2<br /> |
| 1315 | Opcode VOP3A: 420 (0x1a4) for GCN 1.0/1.1; 350 (0x15e) for GCN 1.2<br /> |
| 1316 | Syntax: V_RNDNE_F32 VDST, SRC0<br /> |
| 1317 | Description: Round floating point value SRC0 to nearest even integer, and store result to |
| 1318 | VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST.<br /> |
| 1319 | Operation: |
| 1320 | <code>VDST = RNDNE(ASFLOAT(SRC0))</code></p> |
| 1321 | <h4>V_TRUNC_F32</h4> |
| 1322 | <p>Opcode VOP1: 33 (0x21) for GCN 1.0/1.1; 28 (0x1c) for GCN 1.2<br /> |
| 1323 | Opcode VOP3A: 417 (0x1a1) for GCN 1.0/1.1; 348 (0x15c) for GCN 1.2<br /> |
| 1324 | Syntax: V_TRUNC_F32 VDST, SRC0<br /> |
| 1325 | Description: Get integer value from floating point value SRC0, and store (as float) |
| 1326 | it to VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST.<br /> |
| 1327 | Operation:<br /> |
| 1328 | <code>VDST = RNDTZ(ASFLOAT(SRC0))</code></p> |