| 289 | <h4>V_ADD_F32</h4> |
| 290 | <p>Opcode VOP2: 3 (0x3) for GCN 1.0/1.1; 1 (0x1) for GCN 1.2<br /> |
| 291 | Opcode VOP3a: 259 (0x103) for GCN 1.0/1.1; 257 (0x101) for GCN 1.2<br /> |
| 292 | Syntax: V_ADD_F32 VDST, SRC0, SRC1<br /> |
| 293 | Description: Add two FP value from SRC0 and SRC1 and store result to VDST.<br /> |
| 294 | Operation:<br /> |
| 295 | <code>VDST = (FLOAT)SRC0 + (FLOAT)SRC1</code></p> |
| 296 | <h4>V_CNDMASK_B32</h4> |
| 297 | <p>Opcode VOP2: 0 (0x0) for GCN 1.0/1.1; 1 (0x0) for GCN 1.2<br /> |
| 298 | Opcode VOP3a: 259 (0x100) for GCN 1.0/1.1; 256 (0x100) for GCN 1.2<br /> |
| 299 | Syntax VOP2: V_CNDMASK_B32 VDST, SRC0, SRC1, VCC<br /> |
| 300 | Syntax VOP3a: V_CNDMASK_B32 VDST, SRC0, SRC1, SSRC2(2)<br /> |
| 301 | Description: If bit for current thread of VCC or SDST is set then store SRC1 to VDST, |
| 302 | otherwise store SRC0 to VDST.<br /> |
| 303 | Operation: |
| 304 | <code>VDST = SSRC2&(1ULL<<THREADID) ? SRC1 : SRC0</code></p> |
| 305 | <h4>V_SUB_F32</h4> |
| 306 | <p>Opcode VOP2: 4 (0x4) for GCN 1.0/1.1; 2 (0x2) for GCN 1.2<br /> |
| 307 | Opcode VOP3a: 260 (0x104) for GCN 1.0/1.1; 258 (0x102) for GCN 1.2<br /> |
| 308 | Syntax: V_SUB_F32 VDST, SRC0, SRC1<br /> |
| 309 | Description: Subtract two FP value from SRC0 and SRC1 and store result to VDST.<br /> |
| 310 | Operation:<br /> |
| 311 | <code>VDST = (FLOAT)SRC0 - (FLOAT)SRC1</code></p> |