Changes between Version 2 and Version 3 of GcnInstrsVop2

Timestamp:

11/20/15 21:00:19 (8 years ago)

Author:

trac

Comment:

--

GcnInstrsVop2

@@ -300 +300 @@
 Syntax VOP3a: V_CNDMASK_B32 VDST, SRC0, SRC1, SSRC2(2)<br />
 Description: If bit for current thread of VCC or SDST is set then store SRC1 to VDST,
-otherwise store SRC0 to VDST.<br />
+otherwise store SRC0 to VDST. CLAMP and OMOD modifier doesn't affect on result.<br />
 Operation:
 <code>VDST = SSRC2&amp;(1ULL&lt;&lt;THREADID) ? SRC1 : SRC0</code></p>
+<h4>V_READLANE_B32</h4>
+<p>Opcode VOP2: 1 (0x1) for GCN 1.0/1.1<br />
+Opcode VOP3a: 257 (0x101) for GCN 1.0/1.1<br />
+Syntax: V_READLANE_B32 SDST, VSRC0, SSRC1<br />
+Description: Copy one VSRC0 lane value to one SDST. Lane (thread id) choosen from SSRC1&amp;63.
+SSRC1 can be SGPR or M0.<br />
+Operation:<br />
+<code>SDST = VSRC0[SSRC1 &amp; 63]</code></p>
+<h4>V_WRITELANE_B32</h4>
+<p>Opcode VOP2: 2 (0x2) for GCN 1.0/1.1<br />
+Opcode VOP3a: 258 (0x102) for GCN 1.0/1.1<br />
+Syntax: V_WRITELANE_B32 VDST, VSRC0, SSRC1<br />
+Description: Copy SGPR to one lane of VDST. Lane choosen (thread id) from SSRC1&amp;63.
+SSRC1 can be SGPR or M0.<br />
+Operation:<br />
+<code>VDST[SSRC1 &amp; 63] = SSRC0</code></p>
 <h4>V_SUB_F32</h4>
 <p>Opcode VOP2: 4 (0x4) for GCN 1.0/1.1; 2 (0x2) for GCN 1.2<br />
 Opcode VOP3a: 260 (0x104) for GCN 1.0/1.1; 258 (0x102) for GCN 1.2<br />
 Syntax: V_SUB_F32 VDST, SRC0, SRC1<br />
-Description: Subtract two FP value from SRC0 and SRC1 and store result to VDST.<br />
+Description: Subtract FP value from SRC0 and FP value from SRC1 and store result to VDST.<br />
 Operation:<br />
 <code>VDST = (FLOAT)SRC0 - (FLOAT)SRC1</code></p>