Changes between Version 31 and Version 32 of GcnInstrsVop2


Ignore:
Timestamp:
11/25/17 14:00:31 (6 years ago)
Author:
trac
Comment:

--

Legend:

Unmodified
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  • GcnInstrsVop2

    v31 v32  
    842842Description: Add SRC0 to SRC1 and store result to VDST and store carry flag to
    843843SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit.
    844 Bits for inactive threads in SDST are always zeroed.<br />
     844Bits for inactive threads in SDST are always zeroed.
     845If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    845846Operation:<br />
    846847<code>UINT64 temp = (UINT64)SRC0 + (UINT64)SRC1
    847 VDST = temp
     848VDST = CLAMP ? MIN(temp, 0xffffffff) : temp
    848849SDST = 0
    849850UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    858859Description: Add SRC0 to SRC1 and store result to VDST and store carry flag to
    859860SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit.
    860 Bits for inactive threads in SDST are always zeroed.<br />
     861Bits for inactive threads in SDST are always zeroed.
     862If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    861863Operation:<br />
    862864<code>UINT64 temp = (UINT64)SRC0 + (UINT64)SRC1
    863 VDST = temp
     865VDST = CLAMP ? MIN(temp, 0xffffffff) : temp
    864866SDST = 0
    865867UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    870872Syntax: V_ADD_U16 VDST, SRC0, SRC1<br />
    871873Description: Add two 16-bit unsigned values from SRC0 and SRC1 and
    872 store 16-bit unsigned result to VDST.<br />
    873 Operation:<br />
    874 <code>VDST = (SRC0 + SRC1) &amp; 0xffff</code></p>
     874store 16-bit unsigned result to VDST.
     875If CLAMP modifier supplied, then result is saturated to 16-bit unsigned value.<br />
     876Operation:<br />
     877<code>UINT32 TEMP = (SRC0 &amp; 0xffff) + (SRC1 &amp; 0xffff)
     878VDST = CLAMP ? MIN(0xffff, TEMP) : TEMP</code></p>
    875879<h4>V_ADD_U32 (GCN 1.4)</h4>
    876880<p>Opcode VOP2: 52 (0x34) for GCN 1.4<br />
    877881Opcode VOP3B: 308 (0x134) for GCN 1.4<br />
    878882Syntax: V_ADD_U32 VDST, SRC0, SRC1<br />
    879 Description: Add SRC0 to SRC1 and store result to VDST.<br />
    880 Operation:<br />
    881 <code>VDST = SRC0 + SRC1</code></p>
     883Description: Add SRC0 to SRC1 and store result to VDST.
     884If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
     885Operation:<br />
     886<code>UINT64 TEMP = (UINT64)SRC0 + SRC1
     887VDST = CLAMP ? MIN(TEMP, 0xffffffff) : TEMP</code></p>
    882888<h4>V_ADDC_CO_U32</h4>
    883889<p>Opcode VOP2: 28 (0x1c) for GCN 1.4<br />
    … …  
    888894and store result to VDST and store carry flag to SDST (or VCC) bit with number
    889895that equal to lane id. SDST and SSRC2 are 64-bit.
    890 Bits for inactive threads in SDST are always zeroed.<br />
     896Bits for inactive threads in SDST are always zeroed.
     897If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    891898Operation:<br />
    892899<code>UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    894901UINT64 temp = (UINT64)SRC0 + (UINT64)SRC1 + CC
    895902SDST = 0
    896 VDST = temp
     903VDST = CLAMP ? MIN(temp, 0xffffffff) : temp
    897904SDST = (SDST&amp;~mask) | ((temp &gt;&gt; 32) ? mask : 0)</code></p>
    898905<h4>V_ADDC_U32 (GCN 1.0/1.1/1.2)</h4>
    … …  
    904911and store result to VDST and store carry flag to SDST (or VCC) bit with number
    905912that equal to lane id. SDST and SSRC2 are 64-bit.
    906 Bits for inactive threads in SDST are always zeroed.<br />
     913Bits for inactive threads in SDST are always zeroed.
     914If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    907915Operation:<br />
    908916<code>UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    910918UINT64 temp = (UINT64)SRC0 + (UINT64)SRC1 + CC
    911919SDST = 0
    912 VDST = temp
     920VDST = CLAMP ? MIN(temp, 0xffffffff) : temp
    913921SDST = (SDST&amp;~mask) | ((temp &gt;&gt; 32) ? mask : 0)</code></p>
    914922<h4>V_AND_B32</h4>
    … …  
    14071415Syntax: V_SUB_U16 VDST, SRC0, SRC1<br />
    14081416Description: Subtract unsigned 16-bit value of SRC1 from SRC0 and store
    1409 16-bit unsigned result to VDST.<br />
    1410 Operation:<br />
    1411 <code>VDST = (SRC0 - SRC1) &amp; 0xffff</code></p>
     141716-bit unsigned result to VDST.
     1418If CLAMP modifier supplied, then result is saturated to 16-bit unsigned value.<br />
     1419Operation:<br />
     1420<code>INT32 TEMP = (SRC0 &amp; 0xffff) - (SRC1 &amp; 0xffff)
     1421VDST = CLAMP ? MAX(TEMP, 0) : TEMP</code></p>
    14121422<h4>V_SUB_CO_U32</h4>
    14131423<p>Opcode VOP2: 26 (0x1a) for GCN 1.4<br />
    … …  
    14171427Description: Subtract SRC1 from SRC0 and store result to VDST and store borrow flag to
    14181428SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit.
    1419 Bits for inactive threads in SDST are always zeroed.<br />
     1429Bits for inactive threads in SDST are always zeroed.
     1430If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    14201431Operation:<br />
    14211432<code>UINT64 temp = (UINT64)SRC0 - (UINT64)SRC1
    1422 VDST = temp
     1433VDST = CLAMP ? (temp&gt;&gt;32 ? 0 : temp) : temp
    14231434SDST = 0
    14241435UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    14331444Description: Subtract SRC1 from SRC0 and store result to VDST and store borrow flag to
    14341445SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit.
    1435 Bits for inactive threads in SDST are always zeroed.<br />
     1446Bits for inactive threads in SDST are always zeroed.
     1447If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    14361448Operation:<br />
    14371449<code>UINT64 temp = (UINT64)SRC0 - (UINT64)SRC1
    1438 VDST = temp
     1450VDST = CLAMP ? (temp&gt;&gt;32 ? 0 : temp) : temp
    14391451SDST = 0
    14401452UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    14441456Opcode VOP3B: 309 (0x135) for GCN 1.4<br />
    14451457Syntax: V_SUB_U32 VDST, SRC0, SRC1<br />
    1446 Description: Subtract SRC1 with borrow from SRC0, and store result to VDST.<br />
    1447 Operation:<br />
    1448 <code>VDST = SRC0 - SRC1</code></p>
     1458Description: Subtract SRC1 with borrow from SRC0, and store result to VDST.
     1459If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
     1460Operation:<br />
     1461<code>INT64 TEMP = (UINT64)SRC0 - SRC1
     1462VDST = CLAMP ? MAX(0, TEMP) : TEMP</code></p>
    14491463<h4>V_SUBB_CO_U32</h4>
    14501464<p>Opcode VOP2: 29 (0x1d) for GCN 1.4<br />
    … …  
    14551469and store result to VDST and store carry flag to SDST (or VCC) bit with number
    14561470that equal to lane id. Borrow is stored in SSRC2 bit with number of lane id.
    1457 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.<br />
     1471SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.
     1472If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    14581473Operation:<br />
    14591474<code>UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    14611476UINT64 temp = (UINT64)SRC0 - (UINT64)SRC1 - CC
    14621477SDST = 0
    1463 VDST = temp
     1478VDST = CLAMP ? (temp&gt;&gt;32 ? 0 : temp) : temp
    14641479SDST = (SDST&amp;~mask) | ((temp &gt;&gt; 32) ? mask : 0)</code></p>
    14651480<h4>V_SUBB_U32 (GCN 1.0/1.1/1.2)</h4>
    … …  
    14711486and store result to VDST and store carry flag to SDST (or VCC) bit with number
    14721487that equal to lane id. Borrow is stored in SSRC2 bit with number of lane id.
    1473 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.<br />
     1488SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.
     1489If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    14741490Operation:<br />
    14751491<code>UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    14771493UINT64 temp = (UINT64)SRC0 - (UINT64)SRC1 - CC
    14781494SDST = 0
    1479 VDST = temp
     1495VDST = CLAMP ? (temp&gt;&gt;32 ? 0 : temp) : temp
    14801496SDST = (SDST&amp;~mask) | ((temp &gt;&gt; 32) ? mask : 0)</code></p>
    14811497<h4>V_SUBBREV_CO_U32</h4>
    … …  
    14871503and store result to VDST and store carry flag to SDST (or VCC) bit with number
    14881504that equal to lane id. Borrow is stored in SSRC2 bit with number of lane id.
    1489 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.<br />
     1505SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.
     1506If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    14901507Operation:<br />
    14911508<code>UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    14931510UINT64 temp = (UINT64)SRC1 - (UINT64)SRC0 - CC
    14941511SDST = 0
    1495 VDST = temp
     1512VDST = CLAMP ? (temp&gt;&gt;32 ? 0 : temp) : temp
    14961513SDST = (SDST&amp;~mask) | ((temp &gt;&gt; 32) ? mask : 0)</code></p>
    14971514<h4>V_SUBBREV_U32 (GCN 1.0/1.1/1.2)</h4>
    … …  
    15031520and store result to VDST and store carry flag to SDST (or VCC) bit with number
    15041521that equal to lane id. Borrow is stored in SSRC2 bit with number of lane id.
    1505 SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.<br />
     1522SDST and SSRC2 are 64-bit. Bits for inactive threads in SDST are always zeroed.
     1523If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    15061524Operation:<br />
    15071525<code>UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    15091527UINT64 temp = (UINT64)SRC1 - (UINT64)SRC0 - CC
    15101528SDST = 0
    1511 VDST = temp
     1529VDST = CLAMP ? (temp&gt;&gt;32 ? 0 : temp) : temp
    15121530SDST = (SDST&amp;~mask) | ((temp &gt;&gt; 32) ? mask : 0)</code></p>
    15131531<h4>V_SUBREV_F16</h4>
    … …  
    15341552Description: Subtract SRC0 from SRC1 and store result to VDST and store borrow flag to
    15351553SDST (or VCC) bit with number that equal to lane id. SDST is 64-bit.
    1536 Bits for inactive threads in SDST are always zeroed.<br />
     1554Bits for inactive threads in SDST are always zeroed.
     1555If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
    15371556Operation:<br />
    15381557<code>UINT64 temp = (UINT64)SRC1 - (UINT64)SRC0
    1539 VDST = temp
     1558VDST = CLAMP ? (temp&gt;&gt;32 ? 0 : temp) : temp
    15401559SDST = 0
    15411560UINT64 mask = (1ULL&lt;&lt;LANEID)
    … …  
    15461565Syntax: V_SUBREV_U16 VDST, SRC0, SRC1<br />
    15471566Description: Subtract unsigned 16-bit value of SRC0 from SRC1 and store
    1548 16-bit unsigned result to VDST.<br />
    1549 Operation:<br />
    1550 <code>VDST = (SRC1 - SRC0) &amp; 0xffff</code></p>
     156716-bit unsigned result to VDST.
     1568If CLAMP modifier supplied, then result is saturated to 16-bit unsigned value.<br />
     1569Operation:<br />
     1570<code>INT32 TEMP = (SRC1 &amp; 0xffff) - (SRC0 &amp; 0xffff)
     1571VDST = CLAMP ? MAX(0, TEMP) : TEMP</code></p>
    15511572<h4>V_SUBREV_U32 (GCN 1.4)</h4>
    15521573<p>Opcode VOP2: 54 (0x36) for GCN 1.4<br />
    15531574Opcode VOP3B: 310 (0x136) for GCN 1.4<br />
    15541575Syntax: V_SUBREV_U32 VDST, SRC0, SRC1<br />
    1555 Description: Subtract SRC0 with borrow from SRC1, and store result to VDST.<br />
    1556 Operation:<br />
    1557 <code>VDST = SRC1 - SRC0</code></p>
     1576Description: Subtract SRC0 with borrow from SRC1, and store result to VDST.
     1577If CLAMP modifier supplied, then result is saturated to 32-bit unsigned value.<br />
     1578Operation:<br />
     1579<code>INT64 TEMP = (UINT64)SRC1 - SRC0
     1580VDST = CLAMP ? MAX(0, TEMP) : TEMP</code></p>
    15581581<h4>V_XOR_B32</h4>
    15591582<p>Opcode: VOP2: 29 (0x1d) for GCN 1.0/1.1; 21 (0x15) for GCN 1.2<br />