Changes between Version 11 and Version 12 of GcnInstrsVop3


Ignore:
Timestamp:
12/10/15 23:00:19 (8 years ago)
Author:
trac
Comment:

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  • GcnInstrsVop3

    v11 v12  
    991991Description: Special case divide preop and flags. SRC0 is quotient, SRC1 is denominator,
    992992SRC2 is nominator. All input values are floating point values. SRC0 must be equal SRC1
    993 or SRC2 (register can be different, only values must be equal). If input different than
    994 SRC0 is greater or equal than T2=POW(2.0, 96+EXP0), (EXP0 is exponent part (base 2)
    995 of SRC0), then instruction multiply SRC0 by POW(2.0, 64), and store that value to VDST,
    996 and set flag in bit for current lane in SDST. Otherwise store SRC0 to VDST and clear flag.<br />
     993or SRC2 (register can be different, only values must be equal). If absolute value of
     994the input different than SRC0 is greater or equal than T2=POW(2.0, 96+EXP0)
     995(EXP0 is exponent part (base 2) of SRC0) or this value is NaN,
     996then instruction multiply SRC0 by POW(2.0, 64),
     997and store that value to VDST, and set flag in bit for current lane in SDST.
     998If SRC0 is NaN or infinity then store SRC0 to VDST and set flag.
     999Otherwise store SRC0 to VDST and clear flag.<br />
    9971000Operation:<br />
    9981001<code>FLOAT SF0 = ASFLOAT(SRC0)
     
    10001003FLOAT SF2 = ASFLOAT(SRC2)
    10011004FLOAT S12 = (SRC0!=SRC1) ? SF1 : SF2
    1002 if (S12 &gt;= POW(2.0, 96+FREXP(SF0)-1)
     1005if (ISNAN(SF0) || ABS(SF0) == INF)
     1006{
     1007    VDST = SRC0
     1008    SDST = (SDST &amp; ~MASK) | MASK
     1009}
     1010else if (ABS(S12) &gt;= ABS(POW(2.0, 96+FREXP(SF0)-1) || ISNAN(S12))
    10031011{
    10041012    VDST = SF0 * POW2(2.0, 64)
     
    10171025SRC2 is nominator. All input values are double floating point values.
    10181026SRC0 must be equal SRC1 or SRC2 (register can be different, only values must be equal).
    1019 If input different than SRC0 is greater or equal than T2=POW(2.0, 768+EXP0),
    1020 (EXP0 is exponent part (base 2) of SRC0), then instruction multiply SRC0 by POW(2.0, 128),
     1027If absolute value of the input different than SRC0 is greater or equal than
     1028T2=POW(2.0, 768+EXP0) (EXP0 is exponent part (base 2) of SRC0) or this value is NaN,
     1029then instruction multiply SRC0 by POW(2.0, 128),
    10211030and store that value to VDST, and set flag in bit for current lane in SDST.
     1031If SRC0 is NaN or infinity then store SRC0 to VDST and set flag.
    10221032Otherwise store SRC0 to VDST and clear flag.<br />
    10231033Operation:<br />
     
    10271037DOUBLE S12 = (SRC0!=SRC1) ? SD1 : SD2
    10281038UINT64 MASK = (1ULL&lt;&lt;LANEID)
    1029 if (S12 &gt;= POW(2.0, 768+FREXP(SD0)-1)
     1039if (ISNAN(SD0) || ABS(SD0) == INF)
     1040{
     1041    VDST = SRC0
     1042    SDST = (SDST &amp; ~MASK) | MASK
     1043}
     1044else if (ABS(S12) &gt;= ABS(POW(2.0, 768+FREXP(SD0)-1) || ISNAN(S12))
    10301045{
    10311046    VDST = SD0 * POW2(2.0, 128)