Changes between Version 15 and Version 16 of GcnInstrsVop3

Timestamp:

12/11/15 23:01:09 (8 years ago)

Author:

trac

Comment:

--

GcnInstrsVop3

@@ -1039 +1039 @@
     SDST = (SDST & ~MASK) | MASK
 }
-else if (ABS(S12) >= ABS(POW(2.0, 96+FREXP(SF0)-1) || ISNAN(S12))
+else if (ABS(S12) >= ABS(POW(2.0, 96+FREXP_EXP(SF0)-1) || ISNAN(S12))
 {
     VDST = SF0 * POW2(2.0, 64)
@@ -1073 +1073 @@
     SDST = (SDST & ~MASK) | MASK
 }
-else if (ABS(S12) >= ABS(POW(2.0, 768+FREXP(SD0)-1) || ISNAN(S12))
+else if (ABS(S12) >= ABS(POW(2.0, 768+FREXP_EXP(SD0)-1) || ISNAN(S12))
 {
     VDST = SD0 * POW2(2.0, 128)
@@ -1432 +1432 @@
 for (UINT8 i = 0; i < 4; i++)
     VDST += ABS(((SRC0 &gt;&gt; (i*8)) &amp; 0xff) - ((SRC1 &gt;&gt; (i*8)) &amp; 0xff))</code></p>
+<h4>V_TRIG_REOP_F64</h4>
+<p>Opcode: 372 (0x174) for GCN 1.0/1.1; 658 (0x292) for GCN 1.2<br />
+Syntax: V_TRIG_REOP_F64 VDST(2), SRC0(2), SRC1<br />
+Description:  D.d = Look Up 2/PI (S0.d) with segment select S1.u[4:0].
+Save choosen 53 bits of 2/PI in double floating point value in VDST. Second argument
+is initial segment. First argument is shift of the value (in power form).
+Bit are numbered from MSB to LSB, begins from 1. Choosen bits begins from:
+53<em>SEGMENT + (FREXP_EXP(SRC0)-1)-(53</em>SEGMENT if SRC0&gt;=POW(2.0, 53<em>SEGMENT),
+otherwise 53</em>SEGMENT.<br />
+Operation:<br />
+<code>ASDOUBLE SD0 = ASDOUBLE(SRC0)
+BIT = (SRC1&amp;31) * 53
+if (SD0 &gt;= POW(2.0, 53)
+{
+    if (ABS(SD0) != INF) &amp;&amp; !ISNAN(SD0))
+        BIT += (FREXP_EXP(SD0)-1) - BIT
+    else
+        BIT += 1024 - BIT
+}
+VDST = (DOUBLE)(TWOPERPI[BIT:BIT+52]) * POW(2.0, -BIT-53)</code></p>
 }}}