Changes between Version 29 and Version 30 of GcnInstrsVop3


Ignore:
Timestamp:
11/25/17 17:00:34 (6 years ago)
Author:
trac
Comment:

--

Legend:

Unmodified
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  • GcnInstrsVop3

    v29 v30  
    966966<td>V_CVT_PKNORM_U16_F16</td>
    967967</tr>
     968<tr>
     969<td>667 (0x29b)</td>
     970<td></td>
     971<td>✓</td>
     972<td>V_READLANE_REGRD_B32</td>
     973</tr>
     974<tr>
     975<td>668 (0x29c)</td>
     976<td></td>
     977<td>✓</td>
     978<td>V_ADD_I32</td>
     979</tr>
     980<tr>
     981<td>669 (0x29d)</td>
     982<td></td>
     983<td>✓</td>
     984<td>V_SUB_I32</td>
     985</tr>
     986<tr>
     987<td>670 (0x29e)</td>
     988<td></td>
     989<td>✓</td>
     990<td>V_ADD_I16</td>
     991</tr>
     992<tr>
     993<td>671 (0x29f)</td>
     994<td></td>
     995<td>✓</td>
     996<td>V_SUB_I16</td>
     997</tr>
     998<tr>
     999<td>672 (0x2a0)</td>
     1000<td></td>
     1001<td>✓</td>
     1002<td>V_PACK_B32_F16</td>
     1003</tr>
    9681004</tbody>
    9691005</table>
     
    9761012Operation:<br />
    9771013<code>VDST = ASDOUBLE(SRC0) + ASDOUBLE(SRC1)</code></p>
     1014<h4>V_ADD_I16</h4>
     1015<p>Opcode: 670 (0x29e) for GCN 1.4<br />
     1016Syntax: V_ADD_I16 VDST, SRC0, SRC1<br />
     1017Description: Add 16-bit signed value from SRC0 to 16-bit signed value from SRC1 and
     1018store result to VDST. If CLAMP modifier supplied, then result is saturated to
     101916-bit signed value.<br />
     1020Operation:<br />
     1021<code>UINT16 result = (SRC0&amp;0xffff) + (SRC1&amp;0xffff)
     1022if (CLAMP)
     1023{
     1024    INT32 temp = SEXT32((INT16)SRC0&amp;0xffff) + SEXT32((INT16)SRC1&amp;0xffff)
     1025    if (temp &gt; ((1&lt;&lt;16)-1))
     1026        result = 0x7fff
     1027    if temp &lt; (-1&lt;&lt;16)
     1028        result = 0x8000
     1029}
     1030VDST = (VDST &amp; 0xffff0000) | result</code></p>
     1031<h4>V_ADD_I32</h4>
     1032<p>Opcode: 668 (0x29c) for GCN 1.4<br />
     1033Syntax: V_ADD_I32 VDST, SRC0, SRC1<br />
     1034Description: Add signed value from SRC0 to signed value from SRC1 and store result to VDST.
     1035If CLAMP modifier supplied, then result is saturated to 32-bit signed value.<br />
     1036Operation:<br />
     1037<code>VDST = SRC0 + SRC1
     1038if (CLAMP)
     1039{
     1040    INT64 temp = SEXT64(SRC0) + SEXT64(SRC1)
     1041    if (temp &gt; ((1LL&lt;&lt;31)-1))
     1042        VDST = 0x7fffffff
     1043    if temp &lt; (-1LL&lt;&lt;31)
     1044        VDST = 0x80000000
     1045}</code></p>
    9781046<h4>V_ALIGNBIT_B32</h4>
    9791047<p>Opcode: 334 (0x14e) for GCN 1.0/1.1; 462 (0x1ce) for GCN 1.2<br />
     
    18231891        VDST = ASFLOAT(SRC0) * ASFLOAT(SRC1)
    18241892}</code></p>
     1893<h4>V_PACK_B32_F16</h4>
     1894<p>Opcode: 672 (0x2a0) for GCN 1.4<br />
     1895Syntax: V_PACK_B32_F16 VDST, SRC0, SRC1<br />
     1896Description: Get lower 16-bits from SRC0 and put to lower 16-bits in VDST,
     1897get lower 16-bits from SRC1 and put to higher 16-bits in VDST.<br />
     1898Operation:<br />
     1899<code>VDST = (SRC0&amp;0xffff) | (SRC1&lt;&lt;16)</code></p>
    18251900<h4>V_PERM_B32</h4>
    18261901<p>Opcode: 493 (0x1ed) for GCN 1.2<br />
     
    19081983for (UINT8 i = 0; i &lt; 4; i++)
    19091984    VDST += ABS(((SRC0 &gt;&gt; (i*8)) &amp; 0xff) - ((SRC1 &gt;&gt; (i*8)) &amp; 0xff))</code></p>
     1985<h4>V_SUB_I16</h4>
     1986<p>Opcode: 671 (0x29f) for GCN 1.4<br />
     1987Syntax: V_SUB_I16 VDST, SRC0, SRC1<br />
     1988Description: Subtract 16-bit signed value from SRC1 from 16-bit signed value from SRC0 and
     1989store result to VDST. If CLAMP modifier supplied, then result is saturated to
     199016-bit signed value.<br />
     1991Operation:<br />
     1992<code>UINT16 result = (SRC0&amp;0xffff) - (SRC1&amp;0xffff)
     1993if (CLAMP)
     1994{
     1995    INT32 temp = SEXT32((INT16)SRC0&amp;0xffff) - SEXT32((INT16)SRC1&amp;0xffff)
     1996    if (temp &gt; ((1&lt;&lt;16)-1))
     1997        result = 0x7fff
     1998    if temp &lt; (-1&lt;&lt;16)
     1999        result = 0x8000
     2000}
     2001VDST = (VDST &amp; 0xffff0000) | result</code></p>
     2002<h4>V_SUB_I32</h4>
     2003<p>Opcode: 669 (0x29d) for GCN 1.4<br />
     2004Syntax: V_SUB_I32 VDST, SRC0, SRC1<br />
     2005Description: Subtract signed value from SRC1 from signed value from SRC0 and
     2006store result to VDST. If CLAMP modifier supplied, then result is saturated to
     200732-bit signed value.<br />
     2008Operation:<br />
     2009<code>VDST = SRC0 - SRC1
     2010if (CLAMP)
     2011{
     2012    INT64 temp = SEXT64(SRC0) - SEXT64(SRC1)
     2013    if (temp &gt; ((1LL&lt;&lt;31)-1))
     2014        VDST = 0x7fffffff
     2015    if temp &lt; (-1LL&lt;&lt;31)
     2016        VDST = 0x80000000
     2017}</code></p>
    19102018<h4>V_TRIG_PREOP_F64</h4>
    19112019<p>Opcode: 372 (0x174) for GCN 1.0/1.1; 658 (0x292) for GCN 1.2<br />