Changes between Version 1 and Version 2 of GcnInstrsVopc


Ignore:
Timestamp:
12/04/15 22:00:17 (8 years ago)
Author:
trac
Comment:

--

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  • GcnInstrsVopc

    v1 v2  
    193193</ul>
    194194<p>VOPC opcodes (0-255) and VOP3 opcodes are same.</p>
    195 <h3>Tables of opcodes and their descriptions (GCN 1.0/1.1)</h3>
    196 <p>Table of floating point comparison instructions by opcode:</p>
     195<h3>Tables of opcodes and their descriptions</h3>
     196<p>Table of floating point comparison instructions by opcode (GCN 1.0/1.1):</p>
    197197<table>
    198198<thead>
    … …  
    212212<td>16-31 (0x10-0x1f)</td>
    213213<td>V_CMPX_{OP16}_F32</td>
    214 <td>Signal on sNAN input only. Write result to EXEC. Single FP values.</td>
     214<td>Signal on sNAN input only. Also write result to EXEC. Single FP values.</td>
    215215</tr>
    216216<tr>
    … …  
    222222<td>48-63 (0x30-0x3f)</td>
    223223<td>V_CMPX_{OP16}_F64</td>
    224 <td>Signal on sNAN input only. Write result to EXEC. Double FP values.</td>
     224<td>Signal on sNAN input only. Also write result to EXEC. Double FP values.</td>
     225</tr>
     226<tr>
     227<td>64-79 (0x40-0x4f)</td>
     228<td>V_CMPS_{OP16}_F32</td>
     229<td>Signal on any sNAN. Single FP values.</td>
     230</tr>
     231<tr>
     232<td>80-95 (0x50-0x5f)</td>
     233<td>V_CMPSX_{OP16}_F32</td>
     234<td>Signal on any sNAN. Also write result to EXEC. Single FP values.</td>
     235</tr>
     236<tr>
     237<td>96-111 (0x60-0x6f)</td>
     238<td>V_CMPS_{OP16}_F64</td>
     239<td>Signal on any sNAN. Double FP values.</td>
     240</tr>
     241<tr>
     242<td>112-127 (0x70-0x7f)</td>
     243<td>V_CMPSX_{OP16}_F64</td>
     244<td>Signal on any sNAN. Also write result to EXEC. Double FP values.</td>
     245</tr>
     246</tbody>
     247</table>
     248<p>Table of floating point comparison instructions by opcode (GCN 1.2):</p>
     249<table>
     250<thead>
     251<tr>
     252<th>Opcode range</th>
     253<th>Instruction</th>
     254<th>Description</th>
     255</tr>
     256</thead>
     257<tbody>
     258<tr>
     259<td>32-47 (0x20-0x2f)</td>
     260<td>V_CMP_{OP16}_F32</td>
     261<td>Signal on sNAN input only. Half FP values.</td>
     262</tr>
     263<tr>
     264<td>48-63 (0x30-0x3f)</td>
     265<td>V_CMPX_{OP16}_F32</td>
     266<td>Signal on sNAN input only. Also write result to EXEC. Half FP values.</td>
    225267</tr>
    226268<tr>
    227269<td>64-79 (0x40-0x4f)</td>
    228270<td>V_CMP_{OP16}_F32</td>
    229 <td>Signal on any sNAN. Single FP values.</td>
     271<td>Signal on sNAN input only. Single FP values.</td>
    230272</tr>
    231273<tr>
    232274<td>80-95 (0x50-0x5f)</td>
    233275<td>V_CMPX_{OP16}_F32</td>
    234 <td>Signal on any sNAN. Write result to EXEC. Single FP values.</td>
     276<td>Signal on sNAN input only. Also write result to EXEC. Single FP values.</td>
    235277</tr>
    236278<tr>
    237279<td>96-111 (0x60-0x6f)</td>
    238280<td>V_CMP_{OP16}_F64</td>
    239 <td>Signal on any sNAN. Double FP values.</td>
     281<td>Signal on sNAN input only. Double FP values.</td>
    240282</tr>
    241283<tr>
    242284<td>112-127 (0x70-0x7f)</td>
    243285<td>V_CMPX_{OP16}_F64</td>
    244 <td>Signal on any sNAN. Write result to EXEC. Double FP values.</td>
     286<td>Signal on sNAN input only. Also write result to EXEC. Double FP values.</td>
    245287</tr>
    246288</tbody>
    … …  
    333375<tr>
    334376<td>15 (0xf)</td>
    335 <td>T</td>
     377<td>TRU, T</td>
    336378<td>SDST(LANEID) = 1</td>
    337379</tr>
    … …  
    347389V_CMPSX_EQ_F32 VCC, V0, V1 # V0==V1, store result to EXEC, signal for any sNaN
    348390V_CMPX_LT_F64 VCC, V[2:3], V[4:5]  # V[2:3]&lt;V[4:5]</code></p>
    349 <p>Table of integer comparison instructions by opcode:</p>
     391<p>Table of integer comparison instructions by opcode (GCN 1.0/1.1):</p>
    350392<table>
    351393<thead>
    … …  
    365407<td>144-151 (0x90-0x97)</td>
    366408<td>V_CMPX_{OP8}_I32</td>
    367 <td>Write result to EXEC. Signed 32-bit values.</td>
     409<td>Also write result to EXEC. Signed 32-bit values.</td>
    368410</tr>
    369411<tr>
    … …  
    375417<td>176-183 (0xb0-0xb7)</td>
    376418<td>V_CMPX_{OP8}_I64</td>
    377 <td>Write result to EXEC. Signed 64-bit values.</td>
     419<td>Also write result to EXEC. Signed 64-bit values.</td>
    378420</tr>
    379421<tr>
    … …  
    385427<td>208-215 (0xd0-0xd7)</td>
    386428<td>V_CMPX_{OP8}_U32</td>
    387 <td>Write result to EXEC. Unsigned 32-bit values.</td>
     429<td>Also write result to EXEC. Unsigned 32-bit values.</td>
    388430</tr>
    389431<tr>
    … …  
    395437<td>240-247 (0xf0-0xf7)</td>
    396438<td>V_CMPX_{OP8}_U64</td>
    397 <td>Write result to EXEC. Unsigned 64-bit values.</td>
     439<td>Also write result to EXEC. Unsigned 64-bit values.</td>
     440</tr>
     441</tbody>
     442</table>
     443<p>Table of integer comparison instructions by opcode (GCN 1.2):</p>
     444<table>
     445<thead>
     446<tr>
     447<th>Opcode range</th>
     448<th>Instruction</th>
     449<th>Description</th>
     450</tr>
     451</thead>
     452<tbody>
     453<tr>
     454<td>160-167 (0xa0-0xa7)</td>
     455<td>V_CMP_{OP8}_I16</td>
     456<td>Signed 16-bit values.</td>
     457</tr>
     458<tr>
     459<td>168-175 (0xa8-0xaf)</td>
     460<td>V_CMP_{OP8}_U16</td>
     461<td>Unsigned 16-bit values.</td>
     462</tr>
     463<tr>
     464<td>176-183 (0xb0-0xb7)</td>
     465<td>V_CMPX_{OP8}_I16</td>
     466<td>Also write result to EXEC. Signed 16-bit values.</td>
     467</tr>
     468<tr>
     469<td>184-191 (0xb8-0xbf)</td>
     470<td>V_CMPX_{OP8}_U16</td>
     471<td>Also write result to EXEC. Unsigned 16-bit values.</td>
     472</tr>
     473<tr>
     474<td>192-199 (0xc0-0xc7)</td>
     475<td>V_CMP_{OP8}_I32</td>
     476<td>Signed 32-bit values.</td>
     477</tr>
     478<tr>
     479<td>200-207 (0xc8-0xcf)</td>
     480<td>V_CMP_{OP8}_U32</td>
     481<td>Unsigned 32-bit values.</td>
     482</tr>
     483<tr>
     484<td>208-215 (0xd0-0xd7)</td>
     485<td>V_CMPX_{OP8}_I32</td>
     486<td>Also write result to EXEC. Signed 32-bit values.</td>
     487</tr>
     488<tr>
     489<td>216-223 (0xd8-0xdf)</td>
     490<td>V_CMPX_{OP8}_U32</td>
     491<td>Also write result to EXEC. Unsigned 32-bit values.</td>
     492</tr>
     493<tr>
     494<td>224-231 (0xe0-0xe7)</td>
     495<td>V_CMP_{OP8}_I64</td>
     496<td>Signed 64-bit values.</td>
     497</tr>
     498<tr>
     499<td>232-239 (0xe8-0xef)</td>
     500<td>V_CMP_{OP8}_U64</td>
     501<td>Unsigned 64-bit values.</td>
     502</tr>
     503<tr>
     504<td>240-247 (0xf0-0xf7)</td>
     505<td>V_CMPX_{OP8}_I64</td>
     506<td>Also write result to EXEC. Signed 64-bit values.</td>
     507</tr>
     508<tr>
     509<td>248-255 (0xf8-0xff)</td>
     510<td>V_CMPX_{OP8}_U64</td>
     511<td>Also write result to EXEC. Unsigned 64-bit values.</td>
    398512</tr>
    399513</tbody>
    … …  
    446560<tr>
    447561<td>7 (0x7)</td>
    448 <td>T</td>
     562<td>TRU, T</td>
    449563<td>SDST(LANEID) = 1</td>
    450564</tr>
    … …  
    457571V_CMPX_EQ_U32 VCC, V0, V1 # V0==V1, store result to EXEC, signal for any sNaN</code></p>
    458572<p>Table of class instructions:</p>
    459 <h3>Tables of opcodes and their descriptions (GCN 1.2)</h3>
     573<h4>V_CMP_CLASS_F16</h4>
     574<p>Opcode: 20 (0x14) for GCN 1.2<br />
     575Syntax VOPC: V_CMP_CLASS_F16 VCC, SRC0, SRC1<br />
     576Syntax VOP3: V_CMP_CLASS_F16 SDST, SRC0, SRC1<br />
     577Operation: Check whether SSRC0 half floating point value belongs to one of specified class.
     578Classes are specified as set bits in SRC1. If that condition is satisfied then store
     5791 to bit of SDST with number of current lane id, otherwise clear that bit.
     580No flushing denormalized values for SRC0. List of classes:</p>
     581<table>
     582<thead>
     583<tr>
     584<th>Bit</th>
     585<th>Description</th>
     586</tr>
     587</thead>
     588<tbody>
     589<tr>
     590<td>0</td>
     591<td>Signaling NaN</td>
     592</tr>
     593<tr>
     594<td>1</td>
     595<td>quiet Nan</td>
     596</tr>
     597<tr>
     598<td>2</td>
     599<td>-INF</td>
     600</tr>
     601<tr>
     602<td>3</td>
     603<td>negative normalized value</td>
     604</tr>
     605<tr>
     606<td>4</td>
     607<td>negative dernormalized value</td>
     608</tr>
     609<tr>
     610<td>5</td>
     611<td>negative zero</td>
     612</tr>
     613<tr>
     614<td>6</td>
     615<td>positive zero</td>
     616</tr>
     617<tr>
     618<td>7</td>
     619<td>positive denormalized value</td>
     620</tr>
     621<tr>
     622<td>8</td>
     623<td>positive normalized value</td>
     624</tr>
     625<tr>
     626<td>9</td>
     627<td>+INF</td>
     628</tr>
     629</tbody>
     630</table>
     631<h4>V_CMPX_CLASS_F16</h4>
     632<p>Opcode: 21 (0x15) for GCN 1.2<br />
     633Syntax VOPC: V_CMPX_CLASS_F16 VCC, SRC0, SRC1<br />
     634Syntax VOP3: V_CMPX_CLASS_F16 SDST, SRC0, SRC1<br />
     635Operation: Check whether SSRC0 half floating point value belongs to one of specified class.
     636Classes are specified as set bits in SRC1. If that condition is satisfied then store
     6371 to bit of SDST and EXEC with number of current lane id, otherwise clear that bit.
     638No flushing denormalized values for SRC0. List of classes:</p>
     639<table>
     640<thead>
     641<tr>
     642<th>Bit</th>
     643<th>Description</th>
     644</tr>
     645</thead>
     646<tbody>
     647<tr>
     648<td>0</td>
     649<td>Signaling NaN</td>
     650</tr>
     651<tr>
     652<td>1</td>
     653<td>quiet Nan</td>
     654</tr>
     655<tr>
     656<td>2</td>
     657<td>-INF</td>
     658</tr>
     659<tr>
     660<td>3</td>
     661<td>negative normalized value</td>
     662</tr>
     663<tr>
     664<td>4</td>
     665<td>negative dernormalized value</td>
     666</tr>
     667<tr>
     668<td>5</td>
     669<td>negative zero</td>
     670</tr>
     671<tr>
     672<td>6</td>
     673<td>positive zero</td>
     674</tr>
     675<tr>
     676<td>7</td>
     677<td>positive denormalized value</td>
     678</tr>
     679<tr>
     680<td>8</td>
     681<td>positive normalized value</td>
     682</tr>
     683<tr>
     684<td>9</td>
     685<td>+INF</td>
     686</tr>
     687</tbody>
     688</table>
    460689<h4>V_CMP_CLASS_F32</h4>
    461 <p>Opcode: 0x88<br />
     690<p>Opcode: 136 (0x88) for GCN 1.0/1.1; 16 (0x10) for GCN 1.2<br />
    462691Syntax VOPC: V_CMP_CLASS_F32 VCC, SRC0, SRC1<br />
    463692Syntax VOP3: V_CMP_CLASS_F32 SDST, SRC0, SRC1<br />
    … …  
    517746</table>
    518747<h4>V_CMPX_CLASS_F32</h4>
    519 <p>Opcode: 0x98<br />
     748<p>Opcode: 152 (0x98) for GCN 1.0/1.1; 17 (0x11) for GCN 1.2<br />
    520749Syntax VOPC: V_CMPX_CLASS_F32 VCC, SRC0, SRC1<br />
    521750Syntax VOP3: V_CMPX_CLASS_F32 SDST, SRC0, SRC1<br />
    … …  
    575804</table>
    576805<h4>V_CMP_CLASS_F64</h4>
    577 <p>Opcode: 0xa8<br />
     806<p>Opcode: 168 (0xa8) for GCN 1.0/1.1; 18 (0x12) for GCN 1.2<br />
    578807Syntax VOPC: V_CMP_CLASS_F64 VCC, SRC0, SRC1(2)<br />
    579808Syntax VOP3: V_CMP_CLASS_F64 SDST, SRC0(2), SRC1(2)<br />
    … …  
    633862</table>
    634863<h4>V_CMPX_CLASS_F64</h4>
    635 <p>Opcode: 0xb8<br />
     864<p>Opcode: 184 (0xb8) for GCN 1.01/1.1; 19 (0x13) for GCN 1.2<br />
    636865Syntax VOPC: V_CMPX_CLASS_F64 VCC, SRC0(2), SRC1(2)<br />
    637866Syntax VOP3: V_CMPX_CLASS_F64 SDST, SRC0(2), SRC1(2)<br />