Changes between Version 14 and Version 15 of GcnMemHandling
- Timestamp:
- 12/29/17 14:00:36 (6 years ago)
Legend:
- Unmodified
- Added
- Removed
- Modified
-
GcnMemHandling
v14 v15 460 460 For STRIDE!=0 if AINDEX >= NUMRECORDS or OFFSET >= STRIDE when IDXEN or 461 461 TID_ENABLE is set, then an address is out of range. Reads are zero and writes are ignored 462 for a n addresses out of range.</p>462 for addresses out of range.</p> 463 463 <p>For 32-bit and wider operations, an address are aligned to 4 bytes. 464 464 For 16-bit operations, an address are aligned to 2 bytes.</p> … … 1485 1485 </table> 1486 1486 <h3>Image addressing</h3> 1487 <p>The main addressing rules for images are defined bytiling registers.1487 <p>The main addressing rules for the images are defined by the tiling registers. 1488 1488 The TILINGINDEX choose what register control addressing of image. Index 8 (by default) 1489 choose the linear access. In the most cases images are splitted into t iles which1489 choose the linear access. In the most cases images are splitted into the tiles which 1490 1490 organizes image's data in efficient manner for GPU memory subsystem. Unfortunatelly, 1491 fields oftiling registers and their meanigful are not known (for me).</p>1491 the fields of the tiling registers and their meanigful are not known (for me).</p> 1492 1492 <p>The address of image's pixel is stored in VADDR registers. Number of used registers and 1493 1493 data type depends on the instruction type and image type. Following table describes … … 1613 1613 <p>About accuracy: Threshold of coordinates for image's sampling are 1/256 of distance 1614 1614 between pixels.</p> 1615 <p>The sampling of mipmaps requires normalized coordinates.</p>1615 <p>The sampling of the mipmaps requires normalized coordinates.</p> 1616 1616 <h3>Flat addressing</h3> 1617 1617 <p>By default, FLAT instructions read or write values from main memory.