source: CLRX/CLRadeonExtender/trunk/CLRX/utils/GPUId.h @ 3349

Last change on this file since 3349 was 3349, checked in by matszpk, 19 months ago

CLRadeonExtender: Doxygen for calculatePgmRsrcX. commenting.

File size: 5.0 KB
Line 
1/*
2 *  CLRadeonExtender - Unofficial OpenCL Radeon Extensions Library
3 *  Copyright (C) 2014-2017 Mateusz Szpakowski
4 *
5 *  This library is free software; you can redistribute it and/or
6 *  modify it under the terms of the GNU Lesser General Public
7 *  License as published by the Free Software Foundation; either
8 *  version 2.1 of the License, or (at your option) any later version.
9 *
10 *  This library is distributed in the hope that it will be useful,
11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13 *  Lesser General Public License for more details.
14 *
15 *  You should have received a copy of the GNU Lesser General Public
16 *  License along with this library; if not, write to the Free Software
17 *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
18 */
19/*! \file GPUId.h
20 * \brief GPU identification utilities
21 */
22
23#ifndef __CLRX_GPUID_H__
24#define __CLRX_GPUID_H__
25
26#include <CLRX/Config.h>
27#include <CLRX/utils/Utilities.h>
28#include <string>
29
30/// main namespace
31namespace CLRX
32{
33/*
34 * GPU identification utilities
35 */
36
37/// type of GPU device
38enum class GPUDeviceType: cxbyte
39{
40    CAPE_VERDE = 0, ///< Radeon HD7700
41    PITCAIRN, ///< Radeon HD7800
42    TAHITI, ///< Radeon HD7900
43    OLAND, ///< Radeon R7 250
44    BONAIRE, ///< Radeon R7 260
45    SPECTRE, ///< Kaveri
46    SPOOKY, ///< Kaveri
47    KALINDI, ///< ???  GCN1.1
48    HAINAN, ///< ????  GCN1.0
49    HAWAII, ///< Radeon R9 290
50    ICELAND, ///< ???
51    TONGA, ///< Radeon R9 285
52    MULLINS, ///< ???
53    FIJI,  ///< Radeon Fury
54    CARRIZO, ///< APU
55    DUMMY,
56    GOOSE,
57    HORSE,
58    STONEY,
59    ELLESMERE,
60    BAFFIN,
61    GFX804,
62    GFX900,
63    GFX901,
64    GPUDEVICE_MAX = GFX901,    ///< last value
65   
66    RADEON_HD7700 = CAPE_VERDE, ///< Radeon HD7700
67    RADEON_HD7800 = PITCAIRN,   ///< Radeon HD7800
68    RADEON_HD7900 = TAHITI,     ///< Radeon HD7900
69    RADEON_R7_250 = OLAND,      ///< Radeon R7 250
70    RADEON_R7_260 = BONAIRE,    ///< Radeon R7 260
71    RADEON_R9_290 = HAWAII      ///< Radeon R7 290
72};
73
74/// GPU architecture
75enum class GPUArchitecture: cxbyte
76{
77    GCN1_0 = 0, ///< first iteration (Radeon HD7000 series)
78    GCN1_1,     ///< second iteration (Radeon Rx 200 series)
79    GCN1_2,     ///< third iteration (Radeon Rx 300 series and Tonga)
80    GCN1_4,     ///< GFX9 architecture (AMD RX VEGA)
81    GPUARCH_MAX = GCN1_4    /// last value
82};
83
84/// get GPU device type from name
85extern GPUDeviceType getGPUDeviceTypeFromName(const char* name);
86
87/// get GPU device type name
88extern const char* getGPUDeviceTypeName(GPUDeviceType deviceType);
89
90/// get GPU architecture from name
91extern GPUArchitecture getGPUArchitectureFromName(const char* name);
92
93/// get GPUArchitecture from GPU device type
94extern GPUArchitecture getGPUArchitectureFromDeviceType(GPUDeviceType deviceType);
95
96/// get lowest GPU device for architecture
97extern GPUDeviceType getLowestGPUDeviceTypeFromArchitecture(GPUArchitecture arch);
98
99/// get GPU architecture name
100extern const char* getGPUArchitectureName(GPUArchitecture architecture);
101
102enum: Flags {
103    REGCOUNT_NO_VCC = 1,
104    REGCOUNT_NO_FLAT = 2,
105    REGCOUNT_NO_XNACK = 4,
106    REGCOUNT_NO_EXTRA = 0xffff
107};
108
109enum: cxuint {
110    REGTYPE_SGPR = 0,
111    REGTYPE_VGPR
112};
113
114enum : Flags
115{
116    GCN_VCC = 1,
117    GCN_FLAT = 2,
118    GCN_XNACK = 4
119};
120
121enum: Flags {
122    GPUSETUP_TGSIZE_EN = 1,
123    GPUSETUP_SCRATCH_EN = 2
124};
125
126enum: cxuint {
127    MAX_REGTYPES_NUM = 4
128};
129
130/// get maximum available registers for GPU (type: 0 - scalar, 1 - vector)
131extern cxuint getGPUMaxRegistersNum(GPUArchitecture architecture, cxuint regType,
132                         Flags flags = 0);
133
134/// get maximum available registers for GPU (type: 0 - scalar, 1 - vector)
135extern cxuint getGPUMaxRegsNumByArchMask(uint16_t archMask, cxuint regType);
136
137/// get minimal number of required registers
138extern void getGPUSetupMinRegistersNum(GPUArchitecture architecture, cxuint dimMask,
139               cxuint userDataNum, Flags flags, cxuint* gprsOut);
140
141/// get maximum local size for GPU architecture
142extern size_t getGPUMaxLocalSize(GPUArchitecture architecture);
143
144/// get maximum GDS size for GPU architecture
145extern size_t getGPUMaxGDSSize(GPUArchitecture architecture);
146
147/// get extra registers (like VCC,FLAT_SCRATCH)
148extern cxuint getGPUExtraRegsNum(GPUArchitecture architecture, cxuint regType,
149              Flags flags);
150
151/// structure helper for AMDGPU architecture version
152struct AMDGPUArchValues
153{
154    uint32_t major;     ///< arch major number
155    uint32_t minor;     ///< arch minor number
156    uint32_t stepping;  ///< arch stepping number
157};
158
159/// calculate PGMRSRC1 register value
160uint32_t calculatePgmRSrc1(GPUArchitecture arch, cxuint vgprsNum, cxuint sgprsNum,
161            cxuint priority, cxuint floatMode, bool privMode, bool dx10clamp,
162            bool debugMode, bool ieeeMode);
163
164/// calculate PGMRSRC2 register value
165uint32_t calculatePgmRSrc2(GPUArchitecture arch, bool scratchEn, cxuint userDataNum,
166            bool trapPresent, cxuint dimMask, cxuint defDimValues, bool tgSizeEn,
167            cxuint ldsSize, cxuint exceptions);
168
169};
170
171#endif
Note: See TracBrowser for help on using the repository browser.