source: CLRX/CLRadeonExtender/trunk/ChangeLog @ 3450

Last change on this file since 3450 was 3388, checked in by matszpk, 3 years ago

CLRadeonExtender: Update ChangeLog?.

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2Change Log
3
4CLRadeonExtender 0.1.5:
5
6* ignore case in an access qualifier name's (Amd and AmdCL2)
7* improve handling a '\()' and '\@'
8* add SDWA and DPP words to set instruction encoding
9* fixing few CLRXDocs typos
10* fixes for AMD RX VEGA (GFX900)
11* disassembler prints an instruction's position in comments
12* update GcnTimings
13* update VectorAdd and ReverseBits for LLVM 4.0 and Mesa3D 17.0.0
14* updates in ImageMix (correct workSize calculating for kernel)
15* small fixes in disassembler
16* disassembler can correctly disassemble GalliumCompute for LLVM 4.0
17* add '--llvmVersion' to clrxdisasm
18* dump AMD HSA configuration for GalliumCompute and AmdCL2 (like in ROCm format)
19* disassembler add '@' to hwreg and sendmsg to make dump compatible with clrxasm
20* add '--HSAConfig' to dump AmdCL2 kernel configuration as AMD HSA config
21* add AMD HSA configuration pseudo-ops to GalliumCompute and AmdCL2 binary formats
22* update device list for Gallium and ROCm binary formats for recognizing device
23* fixed support for LLVM>=3.9 and Mesa3D>=17.0.0 in GalliumCompute
24* add pseudo-op '.default_hsa_features' to AmdCL2, Gallium and ROCm formats
25* update headers in code
26* make error handling more compact in assembler's code
27* fixed '.machine', '.codeversion' handling (do not print obsolete warnings)
28* add pkg-config files to installation
29* remove obsolete warnings in CMakeLists.txt
30* added GFX901 support (RX VEGA with HBCC ?)
31* add Config.h and amdbin/Elf.h headers to Doxygen documentation
32* change lowest device for GCN 1.2 to Iceland in GPUId.
33* add support for Windows developments environments: CygWin and MinGW
34* make detecting of 64-bits more portable in CMakeLists.txt (use compiler to do)
35* checking whether std::call_once is available for non full supported std threads
36* use only C++ compiler to check features (Int128Detect.cpp)
37
38CLRadeonExtender 0.1.4r1:
39
40* fixed code operation in SMRD and SMEM instructions
41* fixed parsing symbol register ranges begins from 'exec', 'vcc', 'tma', ...
42* checking end of line at parsing symbol and regvar register ranges
43
44CLRadeonExtender 0.1.4:
45
46* add AMD RX VEGA support (GCN 1.4/VEGA)
47* add symbol scopes
48* add support for 32-bit AMD OpenCL 2.0 binaries
49* update GPU device ids to latest drivers
50* add Ellesmere and Baffin support for AMD OpenCL 1.2 binaries
51* add support for LLVM 3.9, LLVM 4.0 and Mesa3D 17.0
52* add new options to clrxasm (--llvmVersion)
53* add GCN 1.2 instruction set documentation
54* add new SMEM instruction (s_buffer_atomics)
55* add GDS segment size to AMD OpenCL 2.0 binaries
56* add code of samples for GCN 1.2
57* add option to use old AMD OpenCL 1.2 binary format into samples
58* add editor's syntax (NotePad++, Kate, Gedit, VIM)
59* minor fixes in GCN assembler
60* add modifier's parametrization
61* add options to control case-sensitiviness in macro names
62* fixed handling AMDOCL names for 32-bit Windows environment
63* add installation rules for AMDGPU-PRO drivers (OpenSUSE and Ubuntu)
64* add new pseudo-ops '.get_64bit', '.get_arch', '.get_format', '.get_gpu'
65* add autodetection for LLVM and Mesa3D version
66* find correct AMDOCL, MesaOCL and llvm-config at runtime
67
68CLRadeonExtender 0.1.3:
69
70* ROCm binary format support
71* fixed '.format' pseudo-op
72* fixed resolving variables in some specific cases
73* fixed handling AmdCL2 format for device type later than GCN.1.1
74* small fixes in documentation
75* fixed disassemblying s_waitcnt
76* fixed handling floating point literals in assembler and compatibility mode (bugFP)
77* ARMv8 (AArch64) architecture support
78* Android support
79
80CLRadeonExtender 0.1.2:
81
82* AMD OpenCL 2.0 support
83* 64-bit Gallium binary format support
84* support for new closed Linux and Windows drivers
85* new samples
86* documentation for OpenCL 2.0 support (includes ABI)
87* documentation for GCN ISA FLAT encoding
88* lit() specifier to distinguish literal and inline constant
89* alternate macro syntax
90* correct counting registers for automatic configuration
91* fixed handling of conditionals and macro pseudo-ops
92* disassembler can dump configuration in user-friendly form
93
94CLRadeonExtender 0.1.1:
95
96* support for Windows
97* register ranges, and symbol's of register ranges
98* GCN ISA documentation
99* fixed AMD Catalyst and Gallium compute binary generator
100* fixed clrxasm
101
102CLRadeonExtender 0.1:
103
104* first published version
105
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