source: CLRX/CLRadeonExtender/trunk/tests/amdasm/AsmROCmFormat.cpp @ 3662

Last change on this file since 3662 was 3662, checked in by matszpk, 3 years ago

CLRadeonExtender: ROCm: Add eflags support (allow to set or get various e_flags value in ELF header).

File size: 21.5 KB
Line 
1/*
2 *  CLRadeonExtender - Unofficial OpenCL Radeon Extensions Library
3 *  Copyright (C) 2014-2018 Mateusz Szpakowski
4 *
5 *  This library is free software; you can redistribute it and/or
6 *  modify it under the terms of the GNU Lesser General Public
7 *  License as published by the Free Software Foundation; either
8 *  version 2.1 of the License, or (at your option) any later version.
9 *
10 *  This library is distributed in the hope that it will be useful,
11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13 *  Lesser General Public License for more details.
14 *
15 *  You should have received a copy of the GNU Lesser General Public
16 *  License along with this library; if not, write to the Free Software
17 *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
18 */
19
20#include <CLRX/Config.h>
21#include <iostream>
22#include <cstdio>
23#include <sstream>
24#include <algorithm>
25#include <memory>
26#include <CLRX/amdasm/Assembler.h>
27#include "../TestUtils.h"
28
29using namespace CLRX;
30
31static void printHexData(std::ostream& os, cxuint indentLevel, size_t size,
32             const cxbyte* data)
33{
34    if (data==nullptr)
35    {
36        for (cxuint j = 0; j < indentLevel; j++)
37            os << "  ";
38        os << "nullptr\n";
39        return;
40    }
41    for (size_t i = 0; i < size; i++)
42    {
43        if ((i&31)==0)
44            for (cxuint j = 0; j < indentLevel; j++)
45                os << "  ";
46        char buf[10];
47        snprintf(buf, 10, "%02x", cxuint(data[i]));
48        os << buf;
49        if ((i&31)==31 || i+1 == size)
50            os << '\n';
51    }
52}
53
54static const char* rocmRegionTypeNames[3] =
55{ "data", "fkernel", "kernel" };
56
57// print dump of ROCm output to stream for comparing with testcase
58static void printROCmOutput(std::ostream& os, const ROCmInput* output)
59{
60    os << "ROCmBinDump:" << std::endl;
61    for (const ROCmSymbolInput& symbol: output->symbols)
62    {
63        os << "  ROCmSymbol: name=" << symbol.symbolName << ", " <<
64                "offset=" << symbol.offset << ", size=" << symbol.size << ", type=" <<
65                rocmRegionTypeNames[cxuint(symbol.type)] << "\n";
66        if (symbol.type == ROCmRegionType::DATA)
67            continue;
68        if (symbol.offset+sizeof(ROCmKernelConfig) > output->codeSize)
69            continue;
70        const ROCmKernelConfig& config = *reinterpret_cast<const ROCmKernelConfig*>(
71                            output->code + symbol.offset);
72       
73        // print kernel configuration
74        os << "    Config:\n"
75            "      amdCodeVersion=" << ULEV(config.amdCodeVersionMajor) << "." <<
76                ULEV(config.amdCodeVersionMajor) << "\n"
77            "      amdMachine=" << ULEV(config.amdMachineKind) << ":" <<
78                ULEV(config.amdMachineMajor) << ":" <<
79                ULEV(config.amdMachineMinor) << ":" <<
80                ULEV(config.amdMachineStepping) << "\n"
81            "      kernelCodeEntryOffset=" << ULEV(config.kernelCodeEntryOffset) << "\n"
82            "      kernelCodePrefetchOffset=" <<
83                ULEV(config.kernelCodePrefetchOffset) << "\n"
84            "      kernelCodePrefetchSize=" << ULEV(config.kernelCodePrefetchSize) << "\n"
85            "      maxScrachBackingMemorySize=" <<
86                ULEV(config.maxScrachBackingMemorySize) << "\n"
87            "      computePgmRsrc1=0x" << std::hex << ULEV(config.computePgmRsrc1) << "\n"
88            "      computePgmRsrc2=0x" << ULEV(config.computePgmRsrc2) << "\n"
89            "      enableSgprRegisterFlags=0x" <<
90                ULEV(config.enableSgprRegisterFlags) << "\n"
91            "      enableFeatureFlags=0x" <<
92                ULEV(config.enableFeatureFlags) << std::dec << "\n"
93            "      workitemPrivateSegmentSize=" <<
94                ULEV(config.workitemPrivateSegmentSize) << "\n"
95            "      workgroupGroupSegmentSize=" <<
96                ULEV(config.workgroupGroupSegmentSize) << "\n"
97            "      gdsSegmentSize=" << ULEV(config.gdsSegmentSize) << "\n"
98            "      kernargSegmentSize=" << ULEV(config.kernargSegmentSize) << "\n"
99            "      workgroupFbarrierCount=" << ULEV(config.workgroupFbarrierCount) << "\n"
100            "      wavefrontSgprCount=" << ULEV(config.wavefrontSgprCount) << "\n"
101            "      workitemVgprCount=" << ULEV(config.workitemVgprCount) << "\n"
102            "      reservedVgprFirst=" << ULEV(config.reservedVgprFirst) << "\n"
103            "      reservedVgprCount=" << ULEV(config.reservedVgprCount) << "\n"
104            "      reservedSgprFirst=" << ULEV(config.reservedSgprFirst) << "\n"
105            "      reservedSgprCount=" << ULEV(config.reservedSgprCount) << "\n"
106            "      debugWavefrontPrivateSegmentOffsetSgpr=" <<
107                ULEV(config.debugWavefrontPrivateSegmentOffsetSgpr) << "\n"
108            "      debugPrivateSegmentBufferSgpr=" <<
109                ULEV(config.debugPrivateSegmentBufferSgpr) << "\n"
110            "      kernargSegmentAlignment=" << 
111                cxuint(config.kernargSegmentAlignment) << "\n"
112            "      groupSegmentAlignment=" <<
113                cxuint(config.groupSegmentAlignment) << "\n"
114            "      privateSegmentAlignment=" <<
115                cxuint(config.privateSegmentAlignment) << "\n"
116            "      wavefrontSize=" << cxuint(config.wavefrontSize) << "\n"
117            "      callConvention=0x" << std::hex << ULEV(config.callConvention) << "\n"
118            "      runtimeLoaderKernelSymbol=0x" <<
119                ULEV(config.runtimeLoaderKernelSymbol) << std::dec << "\n";
120        os << "      ControlDirective:\n";
121        printHexData(os, 3, 128, config.controlDirective);
122    }
123    // print comment and code
124    os << "  Comment:\n";
125    printHexData(os, 1, output->commentSize, (const cxbyte*)output->comment);
126    os << "  Code:\n";
127    printHexData(os, 1, output->codeSize, output->code);
128    if (output->eflags != 0)
129        os << "  EFlags=" << output->eflags << std::endl;
130   
131    // print extra sections if supplied
132    for (BinSection section: output->extraSections)
133    {
134        os << "  Section " << section.name << ", type=" << section.type <<
135                        ", flags=" << section.flags << ":\n";
136        printHexData(os, 1, section.size, section.data);
137    }
138    // print extra symbols if supplied
139    for (BinSymbol symbol: output->extraSymbols)
140        os << "  Symbol: name=" << symbol.name << ", value=" << symbol.value <<
141                ", size=" << symbol.size << ", section=" << symbol.sectionId << "\n";
142    os.flush();
143}
144
145
146struct AsmTestCase
147{
148    const char* input;
149    const char* dump;
150    const char* errors;
151    bool good;
152};
153
154static const AsmTestCase asmTestCases1Tbl[] =
155{
156    {
157        R"ffDXD(        .rocm
158        .gpu Fiji
159.kernel kxx1
160    .fkernel
161    .config
162        .dims x
163        .codeversion 1,0
164        .call_convention 0x34dac
165        .debug_private_segment_buffer_sgpr 98
166        .debug_wavefront_private_segment_offset_sgpr 96
167        .gds_segment_size 100
168        .kernarg_segment_align 32
169        .workgroup_group_segment_size 22
170        .workgroup_fbarrier_count 3324
171        .dx10clamp
172        .exceptions 10
173        .private_segment_align 128
174        .privmode
175        .reserved_sgprs 5,14
176        .runtime_loader_kernel_symbol 0x4dc98b3a
177        .scratchbuffer 77222
178        .reserved_sgprs 9,12
179        .reserved_vgprs 7,17
180        .private_elem_size 16
181    .control_directive
182        .int 1,2,3
183        .fill 116,1,0
184.kernel kxx2
185    .config
186        .dims x
187        .codeversion 1,0
188        .call_convention 0x112223
189.kernel kxx1
190    .config
191        .scratchbuffer 111
192.text
193kxx1:
194        .skip 256
195        s_mov_b32 s7, 0
196        s_endpgm
197       
198.align 256
199kxx2:
200        .skip 256
201        s_endpgm
202.section .comment
203        .ascii "some comment for you"
204.kernel kxx2
205    .control_directive
206        .fill 124,1,0xde
207    .config
208        .use_kernarg_segment_ptr
209    .control_directive
210        .int 0xaadd66cc
211    .config
212.kernel kxx1
213.kernel kxx2
214        .call_convention 0x1112234
215       
216)ffDXD",
217        /* dump */
218        R"ffDXD(ROCmBinDump:
219  ROCmSymbol: name=kxx1, offset=0, size=0, type=fkernel
220    Config:
221      amdCodeVersion=1.1
222      amdMachine=1:8:0:3
223      kernelCodeEntryOffset=256
224      kernelCodePrefetchOffset=0
225      kernelCodePrefetchSize=0
226      maxScrachBackingMemorySize=0
227      computePgmRsrc1=0x3c0040
228      computePgmRsrc2=0xa008081
229      enableSgprRegisterFlags=0x0
230      enableFeatureFlags=0x6
231      workitemPrivateSegmentSize=111
232      workgroupGroupSegmentSize=22
233      gdsSegmentSize=100
234      kernargSegmentSize=0
235      workgroupFbarrierCount=3324
236      wavefrontSgprCount=10
237      workitemVgprCount=1
238      reservedVgprFirst=7
239      reservedVgprCount=11
240      reservedSgprFirst=9
241      reservedSgprCount=4
242      debugWavefrontPrivateSegmentOffsetSgpr=96
243      debugPrivateSegmentBufferSgpr=98
244      kernargSegmentAlignment=5
245      groupSegmentAlignment=4
246      privateSegmentAlignment=7
247      wavefrontSize=6
248      callConvention=0x34dac
249      runtimeLoaderKernelSymbol=0x4dc98b3a
250      ControlDirective:
251      0100000002000000030000000000000000000000000000000000000000000000
252      0000000000000000000000000000000000000000000000000000000000000000
253      0000000000000000000000000000000000000000000000000000000000000000
254      0000000000000000000000000000000000000000000000000000000000000000
255  ROCmSymbol: name=kxx2, offset=512, size=0, type=kernel
256    Config:
257      amdCodeVersion=1.1
258      amdMachine=1:8:0:3
259      kernelCodeEntryOffset=256
260      kernelCodePrefetchOffset=0
261      kernelCodePrefetchSize=0
262      maxScrachBackingMemorySize=0
263      computePgmRsrc1=0xc0000
264      computePgmRsrc2=0x84
265      enableSgprRegisterFlags=0x8
266      enableFeatureFlags=0x0
267      workitemPrivateSegmentSize=0
268      workgroupGroupSegmentSize=0
269      gdsSegmentSize=0
270      kernargSegmentSize=0
271      workgroupFbarrierCount=0
272      wavefrontSgprCount=5
273      workitemVgprCount=1
274      reservedVgprFirst=0
275      reservedVgprCount=0
276      reservedSgprFirst=0
277      reservedSgprCount=0
278      debugWavefrontPrivateSegmentOffsetSgpr=0
279      debugPrivateSegmentBufferSgpr=0
280      kernargSegmentAlignment=4
281      groupSegmentAlignment=4
282      privateSegmentAlignment=4
283      wavefrontSize=6
284      callConvention=0x1112234
285      runtimeLoaderKernelSymbol=0x0
286      ControlDirective:
287      dededededededededededededededededededededededededededededededede
288      dededededededededededededededededededededededededededededededede
289      dededededededededededededededededededededededededededededededede
290      dedededededededededededededededededededededededededededecc66ddaa
291  Comment:
292  736f6d6520636f6d6d656e7420666f7220796f75
293  Code:
294  0100000000000000010008000000030000010000000000000000000000000000
295  0000000000000000000000000000000040003c008180000a000006006f000000
296  16000000640000000000000000000000fc0c00000a00010007000b0009000400
297  6000620005040706ac4d03000000000000000000000000003a8bc94d00000000
298  0100000002000000030000000000000000000000000000000000000000000000
299  0000000000000000000000000000000000000000000000000000000000000000
300  0000000000000000000000000000000000000000000000000000000000000000
301  0000000000000000000000000000000000000000000000000000000000000000
302  800087be000081bf000080bf000080bf000080bf000080bf000080bf000080bf
303  000080bf000080bf000080bf000080bf000080bf000080bf000080bf000080bf
304  000080bf000080bf000080bf000080bf000080bf000080bf000080bf000080bf
305  000080bf000080bf000080bf000080bf000080bf000080bf000080bf000080bf
306  000080bf000080bf000080bf000080bf000080bf000080bf000080bf000080bf
307  000080bf000080bf000080bf000080bf000080bf000080bf000080bf000080bf
308  000080bf000080bf000080bf000080bf000080bf000080bf000080bf000080bf
309  000080bf000080bf000080bf000080bf000080bf000080bf000080bf000080bf
310  0100000000000000010008000000030000010000000000000000000000000000
311  0000000000000000000000000000000000000c00840000000800000000000000
312  0000000000000000000000000000000000000000050001000000000000000000
313  0000000004040406342211010000000000000000000000000000000000000000
314  dededededededededededededededededededededededededededededededede
315  dededededededededededededededededededededededededededededededede
316  dededededededededededededededededededededededededededededededede
317  dedededededededededededededededededededededededededededecc66ddaa
318  000081bf
319)ffDXD",
320        /* warning/errors */
321        "",
322        true
323    },
324    {
325        R"ffDXD(        .rocm
326        .gpu Fiji
327.kernel someKernelX
328    .config
329        .dims xz
330        .call_convention 331
331        .codeversion 1,0
332        .machine 8,0,1,2
333        .debug_private_segment_buffer_sgpr 10
334        .debug_wavefront_private_segment_offset_sgpr 31
335        .exceptions 0x3e
336        .floatmode 0xc3
337        .gds_segment_size 105
338        .group_segment_align 128
339        .kernarg_segment_align 64
340        .kernarg_segment_size 228
341        .kernel_code_entry_offset 256
342        .kernel_code_prefetch_offset 1002
343        .kernel_code_prefetch_size 13431
344        .max_scratch_backing_memory 4212
345        .pgmrsrc1 0xa0000000
346        .pgmrsrc2 0xd00000
347        .priority 2
348        .private_elem_size 8
349        .private_segment_align 32
350        .reserved_sgprs 12,19
351        .reserved_vgprs 26,48
352        .runtime_loader_kernel_symbol 0x3eda1
353        .scratchbuffer 2330
354        .use_debug_enabled
355        .use_flat_scratch_init
356        .use_grid_workgroup_count xz
357        .use_private_segment_buffer
358        .use_ptr64
359        .use_xnack_enabled
360        .wavefront_size 256
361        .workgroup_fbarrier_count 69
362        .workgroup_group_segment_size 324
363        .workitem_private_segment_size 33
364        .vgprsnum 211
365        .sgprsnum 85
366.text
367someKernelX:
368        .skip 256
369        s_endpgm)ffDXD",
370        R"ffDXD(ROCmBinDump:
371  ROCmSymbol: name=someKernelX, offset=0, size=0, type=kernel
372    Config:
373      amdCodeVersion=1.1
374      amdMachine=8:0:1:2
375      kernelCodeEntryOffset=256
376      kernelCodePrefetchOffset=1002
377      kernelCodePrefetchSize=13431
378      maxScrachBackingMemorySize=4212
379      computePgmRsrc1=0xa00c3ab4
380      computePgmRsrc2=0x3ed09291
381      enableSgprRegisterFlags=0x2a1
382      enableFeatureFlags=0x6c
383      workitemPrivateSegmentSize=33
384      workgroupGroupSegmentSize=324
385      gdsSegmentSize=105
386      kernargSegmentSize=228
387      workgroupFbarrierCount=69
388      wavefrontSgprCount=85
389      workitemVgprCount=211
390      reservedVgprFirst=26
391      reservedVgprCount=23
392      reservedSgprFirst=12
393      reservedSgprCount=8
394      debugWavefrontPrivateSegmentOffsetSgpr=31
395      debugPrivateSegmentBufferSgpr=10
396      kernargSegmentAlignment=6
397      groupSegmentAlignment=7
398      privateSegmentAlignment=5
399      wavefrontSize=8
400      callConvention=0x14b
401      runtimeLoaderKernelSymbol=0x3eda1
402      ControlDirective:
403      0000000000000000000000000000000000000000000000000000000000000000
404      0000000000000000000000000000000000000000000000000000000000000000
405      0000000000000000000000000000000000000000000000000000000000000000
406      0000000000000000000000000000000000000000000000000000000000000000
407  Comment:
408  nullptr
409  Code:
410  010000000000000008000000010002000001000000000000ea03000000000000
411  77340000000000007410000000000000b43a0ca09192d03ea1026c0021000000
412  4401000069000000e400000000000000450000005500d3001a0017000c000800
413  1f000a00060705084b010000000000000000000000000000a1ed030000000000
414  0000000000000000000000000000000000000000000000000000000000000000
415  0000000000000000000000000000000000000000000000000000000000000000
416  0000000000000000000000000000000000000000000000000000000000000000
417  0000000000000000000000000000000000000000000000000000000000000000
418  000081bf
419)ffDXD",
420        /* warning/errors */
421        "",
422        true
423    },
424    {
425        R"ffDXD(        .rocm
426        .gpu Fiji
427.kernel someKernelX
428    .config
429        .dims xz
430        .reserved_vgprs 0, 11
431.text
432someKernelX:
433        s_endpgm)ffDXD",
434        "", "test.s:3:1: Error: "
435        "Code for kernel 'someKernelX' is too small for configuration\n", false
436    },
437    {
438        R"ffDXD(        .rocm
439        .gpu Fiji
440.kernel someKernelX
441    .config
442        .dims xz
443        .reserved_vgprs 12,11
444        .reserved_sgprs 17,11
445        .reserved_vgprs 256,257
446        .reserved_sgprs 112,113
447        .debug_private_segment_buffer_sgpr 123
448        .debug_wavefront_private_segment_offset_sgpr 108
449        .private_elem_size 6
450        .private_elem_size 1
451        .private_elem_size 32
452        .kernarg_segment_align 56
453        .kernarg_segment_align 8
454        .private_segment_align 56
455        .private_segment_align 8
456        .wavefront_size 157
457        .wavefront_size 512
458        .pgmrsrc2 0xaa1fd3da2313
459.text
460someKernelX:
461        .skip 256
462        s_endpgm)ffDXD",
463        "", R"ffDXD(test.s:6:28: Error: Wrong register range
464test.s:7:28: Error: Wrong register range
465test.s:8:25: Error: First reserved VGPR register out of range (0-255)
466test.s:8:29: Error: Last reserved VGPR register out of range (0-255)
467test.s:9:25: Error: First reserved SGPR register out of range (0-101)
468test.s:9:29: Error: Last reserved SGPR register out of range (0-101)
469test.s:10:44: Error: SGPR register out of range
470test.s:11:54: Error: SGPR register out of range
471test.s:12:28: Error: Private element size must be power of two
472test.s:13:28: Error: Private element size out of range
473test.s:14:28: Error: Private element size out of range
474test.s:15:32: Error: Alignment must be power of two
475test.s:16:32: Error: Alignment must be not smaller than 16
476test.s:17:32: Error: Alignment must be power of two
477test.s:18:32: Error: Alignment must be not smaller than 16
478test.s:19:25: Error: Wavefront size must be power of two
479test.s:20:25: Error: Wavefront size must be not greater than 256
480test.s:21:19: Warning: Value 0xaa1fd3da2313 truncated to 0xd3da2313
481)ffDXD", false
482    },
483    {   // different eflags
484        R"ffDXD(.rocm
485        .gpu Fiji
486        .eflags 3
487.kernel kxx1
488    .config
489        .dims x
490        .codeversion 1,0
491        .call_convention 0x34dac
492        .debug_private_segment_buffer_sgpr 98
493        .debug_wavefront_private_segment_offset_sgpr 96
494        .gds_segment_size 100
495        .kernarg_segment_align 32
496        .workgroup_group_segment_size 22
497        .workgroup_fbarrier_count 3324
498        .dx10clamp
499        .exceptions 10
500        .private_segment_align 128
501        .privmode
502        .reserved_sgprs 5,14
503        .runtime_loader_kernel_symbol 0x4dc98b3a
504        .scratchbuffer 77222
505        .reserved_sgprs 9,12
506        .reserved_vgprs 7,17
507        .private_elem_size 16
508    .control_directive
509        .int 1,2,3
510        .fill 116,1,0
511.text
512kxx1:
513        .skip 256
514        s_mov_b32 s7, 0
515        s_endpgm
516)ffDXD",
517        R"ffDXD(ROCmBinDump:
518  ROCmSymbol: name=kxx1, offset=0, size=0, type=kernel
519    Config:
520      amdCodeVersion=1.1
521      amdMachine=1:8:0:3
522      kernelCodeEntryOffset=256
523      kernelCodePrefetchOffset=0
524      kernelCodePrefetchSize=0
525      maxScrachBackingMemorySize=0
526      computePgmRsrc1=0x3c0040
527      computePgmRsrc2=0xa008081
528      enableSgprRegisterFlags=0x0
529      enableFeatureFlags=0x6
530      workitemPrivateSegmentSize=77222
531      workgroupGroupSegmentSize=22
532      gdsSegmentSize=100
533      kernargSegmentSize=0
534      workgroupFbarrierCount=3324
535      wavefrontSgprCount=10
536      workitemVgprCount=1
537      reservedVgprFirst=7
538      reservedVgprCount=11
539      reservedSgprFirst=9
540      reservedSgprCount=4
541      debugWavefrontPrivateSegmentOffsetSgpr=96
542      debugPrivateSegmentBufferSgpr=98
543      kernargSegmentAlignment=5
544      groupSegmentAlignment=4
545      privateSegmentAlignment=7
546      wavefrontSize=6
547      callConvention=0x34dac
548      runtimeLoaderKernelSymbol=0x4dc98b3a
549      ControlDirective:
550      0100000002000000030000000000000000000000000000000000000000000000
551      0000000000000000000000000000000000000000000000000000000000000000
552      0000000000000000000000000000000000000000000000000000000000000000
553      0000000000000000000000000000000000000000000000000000000000000000
554  Comment:
555  nullptr
556  Code:
557  0100000000000000010008000000030000010000000000000000000000000000
558  0000000000000000000000000000000040003c008180000a00000600a62d0100
559  16000000640000000000000000000000fc0c00000a00010007000b0009000400
560  6000620005040706ac4d03000000000000000000000000003a8bc94d00000000
561  0100000002000000030000000000000000000000000000000000000000000000
562  0000000000000000000000000000000000000000000000000000000000000000
563  0000000000000000000000000000000000000000000000000000000000000000
564  0000000000000000000000000000000000000000000000000000000000000000
565  800087be000081bf
566  EFlags=3
567)ffDXD", "", true
568    }
569};
570
571static void testAssembler(cxuint testId, const AsmTestCase& testCase)
572{
573    std::istringstream input(testCase.input);
574    std::ostringstream errorStream;
575    std::ostringstream printStream;
576   
577    // create assembler with testcase's input and with ASM_TESTRUN flag
578    Assembler assembler("test.s", input, (ASM_ALL|ASM_TESTRUN)&~ASM_ALTMACRO,
579            BinaryFormat::AMD, GPUDeviceType::CAPE_VERDE, errorStream, printStream);
580    bool good = assembler.assemble();
581   
582    std::ostringstream dumpOss;
583    if (good && assembler.getFormatHandler()!=nullptr)
584        // get format handler and their output
585        printROCmOutput(dumpOss, static_cast<const AsmROCmHandler*>(
586                    assembler.getFormatHandler())->getOutput());
587    /* compare results dump with expected dump */
588    char testName[30];
589    snprintf(testName, 30, "Test #%u", testId);
590   
591    assertValue(testName, "good", int(testCase.good), int(good));
592    assertString(testName, "dump", testCase.dump, dumpOss.str());
593    assertString(testName, "errorMessages", testCase.errors, errorStream.str());
594}
595
596int main(int argc, const char** argv)
597{
598    int retVal = 0;
599    for (size_t i = 0; i < sizeof(asmTestCases1Tbl)/sizeof(AsmTestCase); i++)
600        try
601        { testAssembler(i, asmTestCases1Tbl[i]); }
602        catch(const std::exception& ex)
603        {
604            std::cerr << ex.what() << std::endl;
605            retVal = 1;
606        }
607    return retVal;
608}
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