Changeset 1701 in CLRX


Ignore:
Timestamp:
Nov 13, 2015, 8:47:16 AM (5 years ago)
Author:
matszpk
Message:

CLRadeonExtender: Updated docs: SOP2 instructions set, small fixes in clrxasm invoking and build options for ClrxWrapper.

Location:
CLRadeonExtender/trunk
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/doc/ClrxAsmInvoke.md

    r1640 r1701  
    2626Following options `clrxasm` can recognize:
    2727
    28 * **-D SYMBOL=[VALUE]**, **--defsym=SYMBOL[=VALUE]**
     28* **-D SYMBOL[=VALUE]**, **--defsym=SYMBOL[=VALUE]**
    2929
    3030    Define symbol. Value is optional and if it is not given then assembler set 0 by default.
  • CLRadeonExtender/trunk/doc/ClrxWrapper.md

    r1640 r1701  
    2222    compile program by using CLRX assembler
    2323
    24 * **-D SYMBOL=[VALUE]**, **-defsym=SYMBOL[=VALUE]**
     24* **-D SYMBOL[=VALUE]**, **-defsym=SYMBOL[=VALUE]**
    2525
    2626    Define symbol. Value is optional and if it is not given then assembler set 0 by default.
  • CLRadeonExtender/trunk/doc/GcnInstrsSop2.md

    r1700 r1701  
    6767SDST = SSRC0 + SSRC1
    6868temp = (UINT64)SSRC0 + (UINT64)SSRC1
    69 SCC = temp>((1LL<<31)-1) || temp>(-1LL<<31)
     69SCC = temp > ((1LL<<31)-1) || temp > (-1LL<<31)
    7070```
    7171
     
    9090```
    9191SDST = SSRC0 & SSRC1
    92 SCC = (SSRC0 & SSRC1)!=0
     92SCC = SDST!=0
    9393```
    9494
     
    9898Syntax: S_AND_B64 SDST(2), SSRC0(2), SSRC1(2) 
    9999Description: Do bitwise AND operation on SSRC0 and SSRC1 and store it to SDST, and store
    100 1 to SCC if result is not zero, otherwise store 0 to SCC.
     1001 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.
    101101Operation:
    102102```
    103103SDST = SSRC0 & SSRC1
    104 SCC = (SSRC0 & SSRC1)!=0
     104SCC = SDST!=0
    105105```
    106106
     
    114114```
    115115SDST = SSRC0 & ~SSRC1
    116 SCC = (SSRC0 & ~SSRC1)!=0
     116SCC = SDST!=0
    117117```
    118118
     
    122122Syntax: S_ANDN2_B64 SDST(2), SSRC0(2), SSRC1(2) 
    123123Description: Do bitwise AND operation on SSRC0 and bitwise negated SSRC1 and store
    124 it to SDST, and store 1 to SCC if result is not zero, otherwise store 0 to SCC. 
     124it to SDST, and store 1 to SCC if result is not zero, otherwise store 0 to SCC.
     125SDST, SSRC0, SSRC1 are 64-bit. 
    125126Operation:
    126127```
    127128SDST = SSRC0 & ~SSRC1
    128 SCC = (SSRC0 & ~SSRC1)!=0
     129SCC = SDST!=0
    129130```
    130131
     
    151152```
    152153
     154#### S_LSHL_B32
     155
     156Opcode: 30 (0x1e)
     157Syntax: S_LSHL_B32 SDST, SSRC0, SSRC1 
     158Description: Shift to left SSRC0 by (SSRC1&31) bits and store result into SDST.
     159If result is non-zero store 1 to SCC, otherwise store 0 to SCC. 
     160Operation: 
     161```
     162SDST = (SSRC0) << (SSRC1 & 31)
     163SCC = SDST!=0
     164```
     165
     166#### S_LSHL_B64
     167
     168Opcode: 31 (0x1f)
     169Syntax: S_LSHL_B64 SDST(2), SSRC0(2), SSRC1 
     170Description: Shift to left SSRC0 by (SSRC1&31) bits and store result into SDST.
     171If result is non-zero store 1 to SCC, otherwise store 0 to SCC. SDST, SSRC0 are 64-bit,
     172SSRC1 is 32 bit. 
     173Operation: 
     174```
     175SDST = (SSRC0) << (SSRC1 & 63)
     176SCC = SDST!=0
     177```
     178
    153179#### S_MIN_I32
    154180
     
    159185Operation: 
    160186```
    161 SDST = (INT32)SSSRC0<(INT32)SSSRC1 ? SSSRC0 : SSSRC1
    162 SCC = (INT32)SSSRC0<(INT32)SSSRC1
     187SDST = (INT32)SSSRC0 < (INT32)SSSRC1 ? SSSRC0 : SSSRC1
     188SCC = (INT32)SSSRC0 < (INT32)SSSRC1
    163189```
    164190
     
    171197Operation: 
    172198```
    173 SDST = (UINT32)SSSRC0<(UINT32)SSSRC1 ? SSSRC0 : SSSRC1
    174 SCC = (UINT32)SSSRC0<(UINT32)SSSRC1
     199SDST = (UINT32)SSSRC0 < (UINT32)SSSRC1 ? SSSRC0 : SSSRC1
     200SCC = (UINT32)SSSRC0 < (UINT32)SSSRC1
    175201```
    176202
     
    183209Operation: 
    184210```
    185 SDST = (INT32)SSSRC0>(INT32)SSSRC1 ? SSSRC0 : SSSRC1
    186 SCC = (INT32)SSSRC0>(INT32)SSSRC1
     211SDST = (INT32)SSSRC0 > (INT32)SSSRC1 ? SSSRC0 : SSSRC1
     212SCC = (INT32)SSSRC0 > (INT32)SSSRC1
    187213```
    188214
     
    195221Operation: 
    196222```
    197 SDST = (UINT32)SSSRC0>(UINT32)SSSRC1 ? SSSRC0 : SSSRC1
    198 SCC = (UINT32)SSSRC0>(UINT32)SSSRC1
     223SDST = (UINT32)SSSRC0 > (UINT32)SSSRC1 ? SSSRC0 : SSSRC1
     224SCC = (UINT32)SSSRC0 > (UINT32)SSSRC1
     225```
     226
     227#### S_NAND_B32
     228
     229Opcode: 24 (0x18) 
     230Syntax: S_NAND_B32 SDST, SSRC0, SSRC1 
     231Description: Do bitwise NAND operation on SSRC0 and SSRC1 and store it to SDST, and store
     2321 to SCC if result is not zero, otherwise store 0 to SCC. 
     233Operation:
     234```
     235SDST = ~(SSRC0 & SSRC1)
     236SCC = SDST!=0
     237```
     238
     239#### S_NAND_B64
     240
     241Opcode: 25 (0x19) 
     242Syntax: S_NAND_B64 SDST(2), SSRC0(2), SSRC1(2) 
     243Description: Do bitwise NAND operation on SSRC0 and SSRC1 and store it to SDST, and store
     2441 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit. 
     245Operation:
     246```
     247SDST = ~(SSRC0 & SSRC1)
     248SCC = SDST!=0
     249```
     250
     251#### S_NOR_B32
     252
     253Opcode: 26 (0x1a) 
     254Syntax: S_NOR_B32 SDST, SSRC0, SSRC1 
     255Description: Do bitwise NOR operation on SSRC0 and SSRC1 and store it to SDST, and store
     2561 to SCC if result is not zero, otherwise store 0 to SCC. 
     257Operation:
     258```
     259SDST = ~(SSRC0 | SSRC1)
     260SCC = SDST!=0
     261```
     262
     263#### S_NOR_B64
     264
     265Opcode: 27 (0x1b) 
     266Syntax: S_NOR_B64 SDST(2), SSRC0(2), SSRC1(2) 
     267Description: Do bitwise NOR operation on SSRC0 and SSRC1 and store it to SDST, and store
     2681 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit. 
     269Operation:
     270```
     271SDST = ~(SSRC0 | SSRC1)
     272SCC = SDST!=0
    199273```
    200274
     
    208282```
    209283SDST = SSRC0 | SSRC1
    210 SCC = (SSRC0 | SSRC1)!=0
     284SCC = SDST!=0
    211285```
    212286
     
    216290Syntax: S_OR_B64 SDST(2), SSRC0(2), SSRC1(2) 
    217291Description: Do bitwise OR operation on SSRC0 and SSRC1 and store it to SDST, and store
    218 1 to SCC if result is not zero, otherwise store 0 to SCC.
     2921 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.
    219293Operation:
    220294```
    221295SDST = SSRC0 | SSRC1
    222 SCC = (SSRC0 | SSRC1)!=0
     296SCC = SDST!=0
    223297```
    224298
     
    232306```
    233307SDST = SSRC0 | ~SSRC1
    234 SCC = (SSRC0 | ~SSRC1)!=0
     308SCC = SDST!=0
    235309```
    236310
     
    240314Syntax: S_ORN2_B64 SDST(2), SSRC0(2), SSRC1(2) 
    241315Description: Do bitwise OR operation on SSRC0 and negated SSRC1 and store it to SDST,
    242 and store 1 to SCC if result is not zero, otherwise store 0 to SCC. 
     316and store 1 to SCC if result is not zero, otherwise store 0 to SCC.
     317SDST, SSRC0, SSRC1 are 64-bit. 
    243318Operation:
    244319```
    245320SDST = SSRC0 | ~SSRC1
    246 SCC = (SSRC0 | ~SSRC1)!=0
     321SCC = SDST!=0
    247322```
    248323
     
    285360```
    286361
     362#### S_XNOR_B32
     363
     364Opcode: 28 (0x1c) 
     365Syntax: S_XNOR_B32 SDST, SSRC0, SSRC1 
     366Description: Do bitwise XNOR operation on SSRC0 and SSRC1 and store it to SDST, and store
     3671 to SCC if result is not zero, otherwise store 0 to SCC. 
     368Operation:
     369```
     370SDST = ~(SSRC0 ^ SSRC1)
     371SCC = SDST!=0
     372```
     373
     374#### S_XNOR_B64
     375
     376Opcode: 29 (0x1d) 
     377Syntax: S_XNOR_B64 SDST(2), SSRC0(2), SSRC1(2) 
     378Description: Do bitwise XNOR operation on SSRC0 and SSRC1 and store it to SDST, and store
     3791 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit. 
     380Operation:
     381```
     382SDST = ~(SSRC0 ^ SSRC1)
     383SCC = SDST!=0
     384```
     385
    287386#### S_XOR_B32
    288387
     
    294393```
    295394SDST = SSRC0 ^ SSRC1
    296 SCC = (SSRC0 ^ SSRC1)!=0
     395SCC = SDST!=0
    297396```
    298397
     
    302401Syntax: S_XOR_B64 SDST(2), SSRC0(2), SSRC1(2) 
    303402Description: Do bitwise XOR operation on SSRC0 and SSRC1 and store it to SDST, and store
    304 1 to SCC if result is not zero, otherwise store 0 to SCC.
     4031 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.
    305404Operation: 
    306405```
    307406SDST = SSRC0 ^ SSRC1
    308 SCC = (SSRC0 ^ SSRC1)!=0
    309 ```
     407SCC = SDST!=0
     408```
  • CLRadeonExtender/trunk/programs/clrxasm.pod

    r1640 r1701  
    3030=over 8
    3131
    32 =item B<-D SYMBOL=[VALUE]>, B<--defsym=SYMBOL[=VALUE]>
     32=item B<-D SYMBOL[=VALUE]>, B<--defsym=SYMBOL[=VALUE]>
    3333
    3434Define symbol. Value is optional and if it is not given then assembler set 0 by default.
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