Changeset 1709 in CLRX


Ignore:
Timestamp:
Nov 13, 2015, 11:30:35 PM (5 years ago)
Author:
matszpk
Message:

CLRadeonExtender: Fixed mnemonic in table of instructions.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/doc/GcnInstrsSop2.md

    r1708 r1709  
    3939 18 (0x12) | 18 (0x12) | 16 (0x10)  | S_XOR_B32
    4040 19 (0x13) | 19 (0x13) | 17 (0x11)  | S_XOR_B64
    41  20 (0x14) | 20 (0x14) | 18 (0x12)  | SS_ANDN2_B32
    42  21 (0x15) | 21 (0x15) | 19 (0x13)  | SS_ANDN2_B64
    43  22 (0x16) | 22 (0x16) | 20 (0x14)  | SS_ORN2_B32
    44  23 (0x17) | 23 (0x17) | 21 (0x15)  | SS_ORN2_B64
    45  24 (0x18) | 24 (0x18) | 22 (0x16)  | SS_NAND_B32
    46  25 (0x19) | 25 (0x19) | 23 (0x17)  | SS_NAND_B64
    47  26 (0x1a) | 26 (0x1a) | 24 (0x18)  | SS_NOR_B32
    48  27 (0x1b) | 27 (0x1b) | 25 (0x19)  | SS_NOR_B64
    49  28 (0x1c) | 28 (0x1c) | 26 (0x1a)  | SS_XNOR_B32
    50  29 (0x1d) | 29 (0x1d) | 27 (0x1b)  | SS_XNOR_B64
    51  30 (0x1e) | 30 (0x1e) | 28 (0x1c)  | SS_LSHL_B32
    52  31 (0x1f) | 31 (0x1f) | 29 (0x1d)  | SS_LSHL_B64
    53  32 (0x20) | 32 (0x20) | 30 (0x1e)  | SS_LSHR_B32
    54  33 (0x21) | 33 (0x21) | 31 (0x1f)  | SS_LSHR_B64
    55  34 (0x22) | 34 (0x22) | 32 (0x20)  | SS_ASHR_I32
    56  35 (0x23) | 35 (0x23) | 33 (0x21)  | SS_ASHR_I64
    57  36 (0x24) | 36 (0x24) | 34 (0x22)  | SS_BFM_B32
    58  37 (0x25) | 37 (0x25) | 35 (0x23)  | SS_BFM_B64
    59  38 (0x26) | 38 (0x26) | 36 (0x24)  | SS_MUL_I32
    60  39 (0x27) | 39 (0x27) | 37 (0x25)  | SS_BFE_U32
    61  40 (0x28) | 40 (0x28) | 38 (0x26)  | SS_BFE_I32
    62  41 (0x29) | 41 (0x29) | 39 (0x27)  | SS_BFE_U64
    63  42 (0x2a) | 42 (0x2a) | 40 (0x28)  | SS_BFE_I64
    64  43 (0x2b) | 43 (0x2b) | 41 (0x29)  | SS_CBRANCH_G_FORK
     41 20 (0x14) | 20 (0x14) | 18 (0x12)  | S_ANDN2_B32
     42 21 (0x15) | 21 (0x15) | 19 (0x13)  | S_ANDN2_B64
     43 22 (0x16) | 22 (0x16) | 20 (0x14)  | S_ORN2_B32
     44 23 (0x17) | 23 (0x17) | 21 (0x15)  | S_ORN2_B64
     45 24 (0x18) | 24 (0x18) | 22 (0x16)  | S_NAND_B32
     46 25 (0x19) | 25 (0x19) | 23 (0x17)  | S_NAND_B64
     47 26 (0x1a) | 26 (0x1a) | 24 (0x18)  | S_NOR_B32
     48 27 (0x1b) | 27 (0x1b) | 25 (0x19)  | S_NOR_B64
     49 28 (0x1c) | 28 (0x1c) | 26 (0x1a)  | S_XNOR_B32
     50 29 (0x1d) | 29 (0x1d) | 27 (0x1b)  | S_XNOR_B64
     51 30 (0x1e) | 30 (0x1e) | 28 (0x1c)  | S_LSHL_B32
     52 31 (0x1f) | 31 (0x1f) | 29 (0x1d)  | S_LSHL_B64
     53 32 (0x20) | 32 (0x20) | 30 (0x1e)  | S_LSHR_B32
     54 33 (0x21) | 33 (0x21) | 31 (0x1f)  | S_LSHR_B64
     55 34 (0x22) | 34 (0x22) | 32 (0x20)  | S_ASHR_I32
     56 35 (0x23) | 35 (0x23) | 33 (0x21)  | S_ASHR_I64
     57 36 (0x24) | 36 (0x24) | 34 (0x22)  | S_BFM_B32
     58 37 (0x25) | 37 (0x25) | 35 (0x23)  | S_BFM_B64
     59 38 (0x26) | 38 (0x26) | 36 (0x24)  | S_MUL_I32
     60 39 (0x27) | 39 (0x27) | 37 (0x25)  | S_BFE_U32
     61 40 (0x28) | 40 (0x28) | 38 (0x26)  | S_BFE_I32
     62 41 (0x29) | 41 (0x29) | 39 (0x27)  | S_BFE_U64
     63 42 (0x2a) | 42 (0x2a) | 40 (0x28)  | S_BFE_I64
     64 43 (0x2b) | 43 (0x2b) | 41 (0x29)  | S_CBRANCH_G_FORK
    6565 44 (0x2c) | 44 (0x2c) | 42 (0x2a)  | S_ABSDIFF_I32
    6666 --        | --        | 43 (0x2b)  | S_RFE_RESTORE_B64
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