Changeset 1719 in CLRX


Ignore:
Timestamp:
Nov 15, 2015, 8:59:04 PM (5 years ago)
Author:
matszpk
Message:

CLRadeonExtender: Docs updates: added new instructions to SOP1 list. Missing 'Operation:'.

Location:
CLRadeonExtender/trunk/doc
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/doc/GcnInstrsSop1.md

    r1718 r1719  
    7777Alphabetically sorted instruction list:
    7878
     79#### S_AND_SAVEEXEC_B64
     80
     81Opcode: 36 (0x24) for GCN 1.0/1.1; 32 (0x20) for GCN 1.2 
     82Syntax: S_AND_SAVEEXEC_B64 SDST(2), SDST(2) 
     83Description: Store EXEC register to SDST. Make bitwise AND on SSRC0 and EXEC
     84and store result to EXEC. If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.
     85SDST and SSRC0 are 64-bit. 
     86Operation: 
     87```
     88SDST = EXEC
     89EXEC = SSRC0 & EXEC
     90SCC = EXEC!=0
     91```
     92
     93#### S_ANDN2_SAVEEXEC_B64
     94
     95Opcode: 39 (0x27) for GCN 1.0/1.1; 35 (0x23) for GCN 1.2 
     96Syntax: S_AND_SAVEEXEC_B64 SDST(2), SDST(2) 
     97Description: Store EXEC register to SDST. Make bitwise AND on SSRC0 and negated EXEC
     98and store result to EXEC. If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.
     99SDST and SSRC0 are 64-bit. 
     100Operation: 
     101```
     102SDST = EXEC
     103EXEC = SSRC0 & EXEC
     104SCC = EXEC!=0
     105```
     106
    79107#### S_BCNT0_I32_B32
    80108
     
    83111Description: Count zero bits in SSRC0 and store result to SDST.
    84112If result is non-zero, store 1 to SCC, otherwise store 0 to SCC. 
     113Operation: 
    85114```
    86115SDST = 0
     
    96125Description: Count zero bits in SSRC0 and store result to SDST.
    97126If result is non-zero, store 1 to SCC, otherwise store 0 to SCC. SSRC0 is 64-bit. 
     127Operation: 
    98128```
    99129SDST = 0
     
    109139Description: Count one bits in SSRC0 and store result to SDST.
    110140If result is non-zero, store 1 to SCC, otherwise store 0 to SCC. 
     141Operation: 
    111142```
    112143SDST = 0
     
    122153Description: Count one bits in SSRC0 and store result to SDST.
    123154If result is non-zero, store 1 to SCC, otherwise store 0 to SCC. SSRC0 is 64-bit. 
     155Operation: 
    124156```
    125157SDST = 0
     
    129161```
    130162
     163#### S_BITSET0_B32
     164
     165Opcode: 27 (0x1b) for GCN 1.0/1.1, 24 (0x18) for GCN 1.2 
     166Syntax: S_BITSET0_B32 SDST, SSRC0 
     167Description: Get value from SDST, clear its bit with number specified from SSRC0, and
     168store result to SDST. 
     169Operation: 
     170```
     171SDST &= ~(1U << (SSRC0&31))
     172```
     173
     174#### S_BITSET0_B64
     175
     176Opcode: 28 (0x1c) for GCN 1.0/1.1, 25 (0x19) for GCN 1.2 
     177Syntax: S_BITSET0_B64 SDST(2), SSRC0 
     178Description: Get value from SDST, clear its bit with number specified from SSRC0, and
     179store result to SDST. SDST is 64-bit. 
     180Operation: 
     181```
     182SDST &= ~(1ULL << (SSRC0&63))
     183```
     184
     185#### S_BITSET1_B32
     186
     187Opcode: 29 (0x1d) for GCN 1.0/1.1, 26 (0x1a) for GCN 1.2 
     188Syntax: S_BITSET1_B32 SDST, SSRC0 
     189Description: Get value from SDST, set its bit with number specified from SSRC0, and
     190store result to SDST. 
     191Operation: 
     192```
     193SDST |= 1U << (SSRC0&31)
     194```
     195
     196#### S_BITSET1_B64
     197
     198Opcode: 30 (0x1e) for GCN 1.0/1.1, 27 (0x1c) for GCN 1.2 
     199Syntax: S_BITSET1_B64 SDST(2), SSRC0 
     200Description: Get value from SDST, set its bit with number specified from SSRC0, and
     201store result to SDST. SDST is 64-bit. 
     202Operation: 
     203```
     204SDST |= 1ULL << (SSRC0&63)
     205```
     206
    131207#### S_BREV_B32
    132208
     
    134210Syntax: S_BREV_B32 SDST, SSRC0 
    135211Description: Reverse bits in SSRC0 and store result to SDST. SCC is not changed. 
     212Operation: 
    136213```
    137214SDST = REVBIT(SSRC0)
     
    144221Description: Reverse bits in SSRC0 and store result to SDST. SCC is not changed.
    145222SDST and SSRC0 are 64-bit. 
     223Operation: 
    146224```
    147225SDST = REVBIT(SSRC0)
     
    174252Opcode: 17 (0x11) for GCN 1.0/1.1; 14 (0xe) for GCN 1.2 
    175253Syntax: S_FF0_I32_B32 SDST, SSRC0 
    176 Description: Find first zero bit in SSRC0. If found store number of bit to SDST,
     254Description: Find first zero bit in SSRC0. If found, store number of bit to SDST,
    177255otherwise set SDST to -1. 
     256Operation: 
    178257```
    179258SDST = -1
     
    187266Opcode: 18 (0x12) for GCN 1.0/1.1; 15 (0xf) for GCN 1.2 
    188267Syntax: S_FF0_I32_B64 SDST, SSRC0(2) 
    189 Description: Find first zero bit in SSRC0. If found store number of bit to SDST,
     268Description: Find first zero bit in SSRC0. If found, store number of bit to SDST,
    190269otherwise set SDST to -1. SSRC0 is 64-bit. 
     270Operation: 
    191271```
    192272SDST = -1
     
    200280Opcode: 19 (0x13) for GCN 1.0/1.1; 16 (0x10) for GCN 1.2 
    201281Syntax: S_FF1_I32_B32 SDST, SSRC0 
    202 Description: Find first one bit in SSRC0. If found store number of bit to SDST,
     282Description: Find first one bit in SSRC0. If found, store number of bit to SDST,
    203283otherwise set SDST to -1. 
     284Operation: 
    204285```
    205286SDST = -1
     
    213294Opcode: 20 (0x14) for GCN 1.0/1.1; 17 (0x11) for GCN 1.2 
    214295Syntax: S_FF0_I32_B64 SDST, SSRC0(2) 
    215 Description: Find first one bit in SSRC0. If found store number of bit to SDST,
     296Description: Find first one bit in SSRC0. If found, store number of bit to SDST,
    216297otherwise set SDST to -1. SSRC0 is 64-bit. 
     298Operation: 
    217299```
    218300SDST = -1
     
    226308Opcode: 21 (0x15) for GCN 1.0/1.1; 18 (0x12) for GCN 1.2 
    227309Syntax: S_FLBIT_I32_B32 SDST, SSRC0 
    228 Description: Find last one bit in SSRC0. If found store number of skipped bits to SDST,
     310Description: Find last one bit in SSRC0. If found, store number of skipped bits to SDST,
    229311otherwise set SDST to -1. 
     312Operation: 
    230313```
    231314SDST = -1
     
    239322Opcode: 22 (0x16) for GCN 1.0/1.1; 19 (0x13) for GCN 1.2 
    240323Syntax: S_FLBIT_I32_B64 SDST, SSRC0(2) 
    241 Description: Find last one bit in SSRC0. If found store number of skipped bits to SDST,
    242 otherwise set SDST to -1.  SSRC0 is 64-bit 
     324Description: Find last one bit in SSRC0. If found, store number of skipped bits to SDST,
     325otherwise set SDST to -1.  SSRC0 is 64-bit. 
     326Operation: 
    243327```
    244328SDST = -1
     
    248332```
    249333
     334#### S_FLBIT_I32
     335
     336Opcode: 23 (0x17) for GCN 1.0/1.1; 20 (0x14) for GCN 1.2 
     337Syntax: S_FLBIT_I32 SDST, SSRC0 
     338Description: Find last opposite bit to sign in SSRC0. If found, store number of skipped bits
     339to SDST, otherwise set SDST to -1. 
     340Operation: 
     341```
     342SDST = -1
     343UINT32 bitval = (INT32)SSRC0>=0 ? 1 : 0
     344for (INT8 i = 31; i >= 0; i++)
     345    if ((1U<<i) & SSRC0) == (bitval<<i))
     346    { SDST = 31-i; break; }
     347```
     348
     349#### S_FLBIT_I32_I64
     350
     351Opcode: 24 (0x18) for GCN 1.0/1.1; 21 (0x15) for GCN 1.2 
     352Syntax: S_FLBIT_I32_I64 SDST, SSRC0(2) 
     353Description: Find last opposite bit to sign in SSRC0. If found, store number of skipped bits
     354to SDST, otherwise set SDST to -1. SSRC0 is 64-bit. 
     355Operation: 
     356```
     357SDST = -1
     358UINT64 bitval = (INT64)SSRC0>=0 ? 1 : 0
     359for (INT8 i = 63; i >= 0; i++)
     360    if ((1U<<i) & SSRC0) == (bitval<<i))
     361    { SDST = 63-i; break; }
     362```
     363
     364#### S_GETPC_B64
     365
     366Opcode: 31 (0x1f) for GCN 1.0/1.1; 28 (0x1c) for GCN 1.2 
     367Syntax: S_GETPC_B64 SDST(2) 
     368Description: Store program counter (PC) for next instruction to SDST. SDST is 64-bit. 
     369Operation: 
     370```
     371SDST = PC + 4
     372```
     373
    250374#### S_MOV_B32
    251375
     
    276400```
    277401SDST = SSRC0
     402```
     403
     404#### S_MOVRELS_B32
     405
     406Opcode: 46 (0x2e) for GCN 1.0/1.1; 42 (0x2a) for GCN 1.2 
     407Syntax: S_MOVRELS_B32 SDST, SSRC0 
     408Description: Store value from SGPR[M0+SSRC0_NUMBER] to SDST.
     409SSRC0_NUMBER is number of SDST register. 
     410Operation: 
     411```
     412SDST = SGPR[SSRC0_NUMBER + M0]
     413```
     414
     415#### S_MOVRELS_B64
     416
     417Opcode: 47 (0x2f) for GCN 1.0/1.1; 43 (0x2b) for GCN 1.2 
     418Syntax: S_MOVRELS_B64 SDST, SSRC0 
     419Description: Store 64-bit value from SGPR[M0+SSRC0_NUMBER:M0+SSRC0_NUMBER+1] to SDST.
     420SSRC0_NUMBER is number of SDST register. 
     421Operation: 
     422```
     423SDST = SGPR[SSRC0_NUMBER + M0]
    278424```
    279425
     
    289435SCC = SDST!=0
    290436```
     437#### S_NAND_SAVEEXEC_B64
     438
     439Opcode: 41 (0x29) for GCN 1.0/1.1; 37 (0x25) for GCN 1.2 
     440Syntax: S_NAND_SAVEEXEC_B64 SDST(2), SDST(2) 
     441Description: Store EXEC register to SDST. Make bitwise NAND on SSRC0 and EXEC
     442and store result to EXEC. If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.
     443SDST and SSRC0 are 64-bit. 
     444Operation: 
     445```
     446SDST = EXEC
     447EXEC = ~(SSRC0 & EXEC)
     448SCC = EXEC!=0
     449```
     450
     451#### S_NOR_SAVEEXEC_B64
     452
     453Opcode: 42 (0x2a) for GCN 1.0/1.1; 38 (0x26) for GCN 1.2 
     454Syntax: S_NOR_SAVEEXEC_B64 SDST(2), SDST(2) 
     455Description: Store EXEC register to SDST. Make bitwise NOR on SSRC0 and EXEC
     456and store result to EXEC. If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.
     457SDST and SSRC0 are 64-bit. 
     458Operation: 
     459```
     460SDST = EXEC
     461EXEC = ~(SSRC0 | EXEC)
     462SCC = EXEC!=0
     463```
    291464
    292465#### S_NOT_B64
     
    301474SDST = ~SSRC0
    302475SCC = SDST!=0
     476```
     477
     478#### S_OR_SAVEEXEC_B64
     479
     480Opcode: 37 (0x25) for GCN 1.0/1.1; 33 (0x21) for GCN 1.2 
     481Syntax: S_OR_SAVEEXEC_B64 SDST(2), SDST(2) 
     482Description: Store EXEC register to SDST. Make bitwise OR on SSRC0 and EXEC
     483and store result to EXEC. If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.
     484SDST and SSRC0 are 64-bit. 
     485Operation: 
     486```
     487SDST = EXEC
     488EXEC = SSRC0 | EXEC
     489SCC = EXEC!=0
     490```
     491
     492#### S_ORN2_SAVEEXEC_B64
     493
     494Opcode: 40 (0x28) for GCN 1.0/1.1; 36 (0x24) for GCN 1.2 
     495Syntax: S_ORN2_SAVEEXEC_B64 SDST(2), SDST(2) 
     496Description: Store EXEC register to SDST. Make bitwise OR on SSRC0 and negated EXEC
     497and store result to EXEC. If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.
     498SDST and SSRC0 are 64-bit. 
     499Operation: 
     500```
     501SDST = EXEC
     502EXEC = SSRC0 & ~EXEC
     503SCC = EXEC!=0
     504```
     505
     506#### S_QUADMASK_B32
     507
     508Opcode: 44 (0x2c) for GCN 1.0/1.1; 40 (0x28) for GCN 1.2 
     509Syntax: S_QUADMASK_B32 SDST, SSRC0 
     510Description: For every 4-bit groups in SSRC0, if any bit of that group is set, then
     511set bit for that group in order, otherwise clear that bits; and store that result into SDST.
     512If result is non-zero, store 1 to SCC, otherwise store 0 to SCC. 
     513Operation: 
     514```
     515UINT32 temp = 0
     516for (UINT8 i = 0; i < 8; i++)
     517    temp |= ((SSRC0>>(i<<2)) & 15)!=0 ? (1U<<i) : 0
     518SDST = temp
     519SCC = SDST!=0
     520```
     521
     522#### S_QUADMASK_B64
     523
     524Opcode: 45 (0x2d) for GCN 1.0/1.1; 41 (0x29) for GCN 1.2 
     525Syntax: S_QUADMASK_B64 SDST(2), SSRC0(2) 
     526Description: For every 4-bit groups in SSRC0, if any bit of that group is set, then
     527set bit for that group in order, otherwise clear that bits; and store that result into SDST.
     528If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.
     529SDST and SSRC0 are 64-bit. 
     530Operation: 
     531```
     532UINT64 temp = 0
     533for (UINT8 i = 0; i < 16; i++)
     534    temp |= ((SSRC0>>(i<<2)) & 15)!=0 ? (1U<<i) : 0
     535SDST = temp
     536SCC = SDST!=0
     537```
     538
     539#### S_RFE_B64
     540
     541Opcode: 34 (0x22) for GCN 1.0/1.1; 31 (0x1f) for GCN 1.2 
     542Syntac: S_RFE_B64 SSRC0(2) 
     543Description: Return from exception (store TTMP[0:1] to PC ???). 
     544Operation: ??? 
     545```
     546PC = TTMP[0:1]
     547```
     548
     549#### S_SETPC_B64
     550
     551Opcode: 32 (0x20) for GCN 1.0/1.1; 29 (0x1d) for GCN 1.2 
     552Syntax: S_SETPC_B64 SSRC0(2) 
     553Description: Jump to address given SSRC0 (store SSRC0 to PC). SSRC0 is 64-bit. 
     554Operation: 
     555```
     556PC = SSRC0
     557```
     558
     559#### S_SEXT_I32_I8
     560
     561Opcode: 25 (0x19) for GCN 1.0/1.1; 22 (0x16) for GCN 1.2 
     562Syntax: S_SEXT_I32_I8 SDST, SSRC0 
     563Description: Store signed extended 8-bit value from SSRC0 to SDST. 
     564Operation: 
     565```
     566SDST = SEXT((INT8)SSRC0)
     567```
     568
     569#### S_SEXT_I32_I16
     570
     571Opcode: 26 (0x1a) for GCN 1.0/1.1; 23 (0x17) for GCN 1.2 
     572Syntax: S_SEXT_I32_I16 SDST, SSRC0 
     573Description: Store signed extended 16-bit value from SSRC0 to SDST. 
     574Operation: 
     575```
     576SDST = SEXT((INT16)SSRC0)
     577```
     578
     579#### S_SWAPPC_B64
     580
     581Opcode: 33 (0x21) for GCN 1.0/1.1; 30 (0x1e) for GCN 1.2 
     582Syntax: S_SWAPPC_B64 SDST(2), SSRC0(2) 
     583Description: Store program counter to SDST and jump to address given SSRC0
     584(store SSRC0 to PC). SDST and SSRC0 are 64-bit. 
     585Operation: 
     586```
     587SDST = PC + 4
     588PC = SSRC0
    303589```
    304590
     
    312598Operation: 
    313599```
    314 UINT32 temp
     600UINT32 temp = 0
    315601for (UINT8 i = 0; i < 32; i+=4)
    316602    temp |= ((SSRC0>>i) & 15)!=0 ? (15<<i) : 0
     
    329615Operation: 
    330616```
    331 UINT64 temp
     617UINT64 temp = 0
    332618for (UINT8 i = 0; i < 64; i+=4)
    333619    temp |= ((SSRC0>>i) & 15)!=0 ? (15ULL<<i) : 0
     
    335621SCC = SDST!=0
    336622```
     623
     624#### S_XNOR_SAVEEXEC_B64
     625
     626Opcode: 43 (0x2b) for GCN 1.0/1.1; 39 (0x27) for GCN 1.2 
     627Syntax: S_XNOR_SAVEEXEC_B64 SDST(2), SDST(2) 
     628Description: Store EXEC register to SDST. Make bitwise XNOR on SSRC0 and EXEC
     629and store result to EXEC. If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.
     630SDST and SSRC0 are 64-bit. 
     631Operation: 
     632```
     633SDST = EXEC
     634EXEC = ~(SSRC0 ^ EXEC)
     635SCC = EXEC!=0
     636```
     637
     638#### S_XOR_SAVEEXEC_B64
     639
     640Opcode: 38 (0x26) for GCN 1.0/1.1; 34 (0x22) for GCN 1.2 
     641Syntax: S_XOR_SAVEEXEC_B64 SDST(2), SDST(2) 
     642Description: Store EXEC register to SDST. Make bitwise XOR on SSRC0 and EXEC
     643and store result to EXEC. If result is non-zero, store 1 to SCC, otherwise store 0 to SCC.
     644SDST and SSRC0 are 64-bit. 
     645Operation: 
     646```
     647SDST = EXEC
     648EXEC = SSRC0 ^ EXEC
     649SCC = EXEC!=0
     650```
  • CLRadeonExtender/trunk/doc/GcnInstrsSopk.md

    r1717 r1719  
    271271Description: Multiply signed SDST with SIMM16 and store result into SDST.
    272272SCC has not been changed. 
     273Operation: 
    273274```
    274275SDST = SDST * SIMM16
Note: See TracChangeset for help on using the changeset viewer.