Changeset 1720 in CLRX


Ignore:
Timestamp:
Nov 15, 2015, 10:59:08 PM (5 years ago)
Author:
matszpk
Message:

CLRadeonExtender: Doc updates: new SOP1 instructions: S_MOVRELD_*, S_CBRANCH_JOIN; small fixes

File:
1 edited

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  • CLRadeonExtender/trunk/doc/GcnInstrsSop1.md

    r1719 r1720  
    226226```
    227227
     228#### S_CBRANCH_JOIN
     229
     230Opcode: 50 (0x32) for GCN 1.0/1.1; 46 (0x2e) for GCN 1.2 
     231Syntax: S_CBRANCH_JOIN SSRC0 
     232Description: Join conditional branch that begin from S_CBRANCH_*_FORK. If control stack
     233pointer have same value as SSRC0 then do nothing and jump to next instruction, otherwise
     234pop from control stack value program counter and EXEC value. 
     235Operation: 
     236```
     237if (CSP==SSRC0)
     238    PC += 4
     239else
     240{
     241    CSP--
     242    EXEC = SGPR[CSP*4:CSP*4+1]
     243    PC = SGPRS[CSP*4+2:CSP*4+3]
     244}
     245```
     246
    228247#### S_CMOV_B32
    229248
     
    402421```
    403422
     423#### S_MOVRELD_B32
     424
     425Opcode: 48 (0x30) for GCN 1.0/1.1; 44 (0x2c) for GCN 1.2 
     426Syntax: S_MOVRELD_B32 SDST, SSRC0 
     427Description: Store value from SSRC0 to SGPR[SDST_NUMBER+M0 : SDST_NUMBER+M0+1].
     428SDST_NUMBER is number of SDST register. 
     429Operation: 
     430```
     431SGPR[SDST_NUMBER + M0] = SSRC0
     432```
     433
     434#### S_MOVRELD_B64
     435
     436Opcode: 49 (0x31) for GCN 1.0/1.1; 45 (0x2d) for GCN 1.2 
     437Syntax: S_MOVRELD_B64 SDST, SSRC0 
     438Description: Store value from SSRC0 to SGPR[SDST_NUMBER+M0].
     439SDST_NUMBER is number of SDST register. SDST and SSRC0 are 64-bit 
     440Operation: 
     441```
     442SGPR[SDST_NUMBER + M0 : SDST_NUMBER + M0 + 1] = SSRC0
     443```
     444
    404445#### S_MOVRELS_B32
    405446
     
    407448Syntax: S_MOVRELS_B32 SDST, SSRC0 
    408449Description: Store value from SGPR[M0+SSRC0_NUMBER] to SDST.
    409 SSRC0_NUMBER is number of SDST register. 
     450SSRC0_NUMBER is number of SSRC0 register. 
    410451Operation: 
    411452```
     
    416457
    417458Opcode: 47 (0x2f) for GCN 1.0/1.1; 43 (0x2b) for GCN 1.2 
    418 Syntax: S_MOVRELS_B64 SDST, SSRC0 
    419 Description: Store 64-bit value from SGPR[M0+SSRC0_NUMBER:M0+SSRC0_NUMBER+1] to SDST.
    420 SSRC0_NUMBER is number of SDST register
    421 Operation: 
    422 ```
    423 SDST = SGPR[SSRC0_NUMBER + M0]
     459Syntax: S_MOVRELS_B64 SDST(2), SSRC0(2) 
     460Description: Store 64-bit value from SGPR[M0+SSRC0_NUMBER : M0+SSRC0_NUMBER+1] to SDST.
     461SSRC0_NUMBER is number of SSRC0 register. SDST and SSRC0 are 64-bit
     462Operation: 
     463```
     464SDST = SGPR[SSRC0_NUMBER + M0 : SSRC0_NUMBER + M0 + 1]
    424465```
    425466
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