Changeset 1739 in CLRX


Ignore:
Timestamp:
Nov 21, 2015, 10:34:14 PM (5 years ago)
Author:
matszpk
Message:

CLRadeonExtender: VOP2 instruction's list updates.

File:
1 edited

Legend:

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  • CLRadeonExtender/trunk/doc/GcnInstrsVop2.md

    r1738 r1739  
    121121```
    122122
     123#### V_AND_B32
     124
     125Opcode: VOP2: 27 (0x1b) for GCN 1.0/1.1; 19 (0x13) for GCN 1.2 
     126Opcode: VOP3a: 283 (0x11b) for GCN 1.0/1.1; 275 (0x113) for GCN 1.2 
     127Syntax: V_AND_B32 VDST, SRC0, SRC1 
     128Description: Do bitwise AND on SRC0 and SRC1 and store result to VDST.
     129CLAMP and OMOD modifier doesn't affect on result. 
     130Operation: 
     131```
     132VDST = SRC0 & SRC1
     133```
     134
    123135#### V_ASHR_I32
    124136
     
    200212```
    201213
     214#### V_MAC_F32
     215
     216Opcode VOP2: 31 (0x1f) for GCN 1.0/1.1; 22 (0x16) for GCN 1.2 
     217Opcode VOP3a: 287 (0x11f) for GCN 1.0/1.1; 278 (0x116) for GCN 1.2 
     218Syntax: V_MAC_F32 VDST, SRC0, SRC1 
     219Description: Multiply FP value from SRC0 by FP value from SRC1 and add result to VDST. 
     220Operation: 
     221```
     222VDST = (FLOAT)SRC0 * (FLOAT)SRC1 + (FLOAT)VDST
     223```
     224
    202225#### V_MAC_LEGACY_F32
    203226
    204227Opcode VOP2: 6 (0x6) for GCN 1.0/1.1 
    205228Opcode VOP3a: 262 (0x106) for GCN 1.0/1.1 
    206 Syntax: V_MUL_LEGACY_F32 VDST, SRC0, SRC1 
     229Syntax: V_MAC_LEGACY_F32 VDST, SRC0, SRC1 
    207230Description: Multiply FP value from SRC0 by FP value from SRC1 and add result to VDST.
    208231If one of value is 0.0 then always do not change VDST (do not apply IEEE rules for 0.0*x). 
     
    393416```
    394417
     418#### V_OR_B32
     419
     420Opcode: VOP2: 28 (0x1c) for GCN 1.0/1.1; 20 (0x14) for GCN 1.2 
     421Opcode: VOP3a: 284 (0x11c) for GCN 1.0/1.1; 276 (0x114) for GCN 1.2 
     422Syntax: V_OR_B32 VDST, SRC0, SRC1 
     423Description: Do bitwise OR operation on SRC0 and SRC1 and store result to VDST.
     424CLAMP and OMOD modifier doesn't affect on result. 
     425Operation: 
     426```
     427VDST = SRC0 | SRC1
     428```
     429
    395430#### V_READLANE_B32
    396431
     
    438473VDST = (FLOAT)SRC1 - (FLOAT)SRC0
    439474```
     475
     476#### V_XOR_B32
     477
     478Opcode: VOP2: 29 (0x1d) for GCN 1.0/1.1; 21 (0x15) for GCN 1.2 
     479Opcode: VOP3a: 285 (0x11d) for GCN 1.0/1.1; 277 (0x115) for GCN 1.2 
     480Syntax: V_OR_B32 VDST, SRC0, SRC1 
     481Description: Do bitwise XOR operation on SRC0 and SRC1 and store result to VDST.
     482CLAMP and OMOD modifier doesn't affect on result. 
     483Operation: 
     484```
     485VDST = SRC0 ^ SRC1
     486```
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