Changeset 1760 in CLRX
 Timestamp:
 Nov 28, 2015, 5:19:36 PM (4 years ago)
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 1 edited
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CLRadeonExtender/trunk/doc/GcnInstrsVop1.md
r1759 r1760 227 227 Alphabetically sorted instruction list: 228 228 229 #### V_CEIL_F32 230 231 Opcode VOP1: 34 (0x22) for GCN 1.0/1.1; 29 (0x1d) for GCN 1.2 232 Opcode VOP3A: 418 (0x1a2) for GCN 1.0/1.1; 349 (0x15d) for GCN 1.2 233 Syntax: V_CEIL_F32 VDST, SRC0 234 Description: Truncate floating point valu from SRC0 with rounding to positive infinity 235 (ceilling), and store result to VDST. Implemented by flooring. 236 If SRC0 is infinity or NaN then copy SRC0 to VDST. 237 Operation: 238 ``` 239 FLOAT F = FLOOR(ASFLOAT(SRC0)) 240 if (ASFLOAT(SRC0) > 0.0 && ASFLOAT(SRC0) != F) 241 F += 1.0 242 VDST = F 243 ``` 244 229 245 #### V_CVT_F16_F32 230 246 … … 354 370 ``` 355 371 VDST = (DOUBLE)(INT32)SRC0 372 ``` 373 374 #### V_CVT_F64_U32 375 376 Opcode VOP1: 22 (0x16) 377 Opcode VOP3A: 406 (0x196) for GCN 1.0/1.1; 342 (0x156) for GCN 1.2 378 Syntax: V_CVT_F64_U32 VDST(2), SRC0 379 Description: Convert unsigned 32bit integer to double FP value, and store it to VDST. 380 Operation: 381 ``` 382 VDST = (DOUBLE)SRC0 356 383 ``` 357 384 … … 367 394 Operation: 368 395 ``` 369 if (ABS(SRC0)!=NAN) 370 VDST = (INT32)MAX(MIN(FLOOR(ASFLOAT(SRC0)), 2147483647.0), 2147483648.0) 396 FLOAT SF = ASFLOAT(SF) 397 if (ABS(SF)!=NAN) 398 VDST = (INT32)MAX(MIN(FLOOR(SF), 2147483647.0), 2147483648.0) 371 399 else 372 VDST = (INT32)S RC0>=0 ? 2147483647 : 2147483648400 VDST = (INT32)SF>=0 ? 2147483647 : 2147483648 373 401 ``` 374 402 … … 385 413 ``` 386 414 VDST = 0 387 if ( SRC0!=NAN)415 if (ABS(ASFLOAT(SRC0))!=NAN) 388 416 VDST = (INT32)MAX(MIN(RNDTZINT(ASFLOAT(SRC0)), 2147483647.0), 2147483648.0) 389 417 ``` … … 401 429 ``` 402 430 VDST = 0 403 if ( SRC0!=NAN)431 if (ABS(ASDOUBLE(SRC0))!=NAN) 404 432 VDST = (INT32)MAX(MIN(RNDTZINT(ASDOUBLE(SRC0)), 2147483647.0), 2147483648.0) 405 433 ``` … … 428 456 Description: 429 457 ``` 430 if (ABS(SRC0)!=NAN) 431 VDST = (INT32)MAX(MIN(FLOOR(ASFLOAT(SRC0) + 0.5), 2147483647.0), 2147483648.0) 458 FLOAT SF = ASFLOAT(SRC0) 459 if (ABS(SF)!=NAN) 460 VDST = (INT32)MAX(MIN(FLOOR(SF + 0.5), 2147483647.0), 2147483648.0) 432 461 else 433 VDST = (INT32)S RC0>=0 ? 2147483647 : 2147483648462 VDST = (INT32)SF>=0 ? 2147483647 : 2147483648 434 463 ``` 435 464 … … 446 475 ``` 447 476 VDST = 0 448 if ( SRC0!=NAN)477 if (ABS(ASFLOAT(SRC0))!=NAN) 449 478 VDST = (UINT32)MIN(RNDTZINT(ASFLOAT(SRC0)), 4294967295.0) 479 ``` 480 481 #### V_CVT_U32_F64 482 483 Opcode VOP1: 21 (0x15) 484 Opcode VOP3A: 405 (0x195) for GCN 1.0/1.1; 341 (0x155) for GCN 1.2 485 Syntax: V_CVT_U32_F64 VDST, SRC0(2) 486 Description: Convert 64bit floating point value from SRC0 to unsigned 32bit integer, and 487 store result to VDST. Conversion uses rounding to zero. If value is higher than 488 maximal integer then store MAX_UINT32 to VDST. 489 If input value is NaN then store 0 to VDST. 490 Operation: 491 ``` 492 VDST = 0 493 if (ABS(ASDOUBLE(SRC0))!=NAN) 494 VDST = (UINT32)MIN(RNDTZINT(ASDOUBLE(SRC0)), 4294967295.0) 495 ``` 496 497 #### V_FLOOR_F32 498 499 Opcode VOP1: 37 (0x25) for GCN 1.0/1.1; 31 (0x1f) for GCN 1.2 500 Opcode VOP3A: 421 (0x1a5) for GCN 1.0/1.1; 351 (0x15f) for GCN 1.2 501 Syntax: V_FLOOR_F32 VDST, SRC0 502 Description: Truncate floating point valu from SRC0 with rounding to positive infinity 503 (flooring), and store result to VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST. 504 Operation: 505 ``` 506 VDST = FLOOR(ASFLOAT(SRC0)) 507 ``` 508 509 #### V_FRACT_F32 510 511 Opcode VOP1: 32 (0x20) for GCN 1.0/1.1; 27 (0x1b) for GCN 1.2 512 Opcode VOP3A: 416 (0x1a0) for GCN 1.0/1.1; 347 (0x15b) for GCN 1.2 513 Syntax: V_FRACT VDST, SRC0 514 Description: Get fractional from floating point value SRC0 and store it to VDST. 515 Fractional will be computed by subtracting floor(SRC0) from SRC0. 516 If SRC0 is infinity or NaN then NaN with proper sign is stored to VDST. 517 Operation: 518 ``` 519 FLOAT SF = ASFLOAT(SRC0) 520 if (ABS(SF)!=NAN && SF!=INF && SF!=INF) 521 VDST = SF  FLOOR(ASFLOAT(SF)) 522 else 523 VDST = NAN * SIGN(SF) 450 524 ``` 451 525 … … 491 565 SDST = VSRC0[firstlane] 492 566 ``` 567 568 #### V_RNDNE_F32 569 570 Opcode VOP1: 35 (0x23) for GCN 1.0/1.1; 30 (0x1e) for GCN 1.2 571 Opcode VOP3A: 420 (0x1a4) for GCN 1.0/1.1; 350 (0x15e) for GCN 1.2 572 Syntax: V_RNDNE_F32 VDST, SRC0 573 Description: Round floating point value SRC0 to nearest even integer, and store result to 574 VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST. 575 Operation: 576 ``` 577 VDST = RNDNE(ASFLOAT(SRC0)) 578 ``` 579 580 #### V_TRUNC_F32 581 582 Opcode VOP1: 33 (0x21) for GCN 1.0/1.1; 28 (0x1c) for GCN 1.2 583 Opcode VOP3A: 417 (0x1a1) for GCN 1.0/1.1; 348 (0x15c) for GCN 1.2 584 Syntax: V_TRUNC_F32 VDST, SRC0 585 Description: Get integer value from floating point value SRC0, and store (as float) 586 it to VDST. If SRC0 is infinity or NaN then copy SRC0 to VDST. 587 Operation: 588 ``` 589 VDST = RNDTZ(ASFLOAT(SRC0)) 590 ```
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