Changeset 1776 in CLRX


Ignore:
Timestamp:
Dec 4, 2015, 8:29:27 PM (4 years ago)
Author:
matszpk
Message:

CLRadeonExtender: Allow to use unaligned two SGPRs in source/destination of vector instructions (V_CMP*, V_ADD*, V_CNDMASK_B32).

Location:
CLRadeonExtender/trunk
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/amdasm/GCNAssembler.cpp

    r1775 r1776  
    875875    if (mode1 == GCN_DS1_SGPR) // if SGPRS as destination
    876876        good &= parseSRegRange(asmr, linePtr, dstReg, arch,
    877                        (gcnInsn.mode&GCN_REG_DST_64)?2:1);
     877                       (gcnInsn.mode&GCN_REG_DST_64)?2:1, true,
     878                       INSTROP_SYMREGRANGE|INSTROP_UNALIGNED);
    878879    else // if VGPRS as destination
    879880        good &= parseVRegRange(asmr, linePtr, dstReg, (gcnInsn.mode&GCN_REG_DST_64)?2:1);
     
    885886        if (!skipRequiredComma(asmr, linePtr))
    886887            return;
    887         good &= parseSRegRange(asmr, linePtr, dstCCReg, arch, 2);
     888        good &= parseSRegRange(asmr, linePtr, dstCCReg, arch, 2, true,
     889                               INSTROP_SYMREGRANGE|INSTROP_UNALIGNED);
    888890    }
    889891   
     
    930932        if (!skipRequiredComma(asmr, linePtr))
    931933            return;
    932         good &= parseSRegRange(asmr, linePtr, srcCCReg, arch, 2);
     934        good &= parseSRegRange(asmr, linePtr, srcCCReg, arch, 2, true,
     935                               INSTROP_SYMREGRANGE|INSTROP_UNALIGNED);
    933936    }
    934937   
     
    11281131        if (mode1 == GCN_DST_SGPR) // if SGPRS as destination
    11291132            good &= parseSRegRange(asmr, linePtr, dstReg, arch,
    1130                            (gcnInsn.mode&GCN_REG_DST_64)?2:1);
     1133                           (gcnInsn.mode&GCN_REG_DST_64)?2:1, true,
     1134                           INSTROP_SYMREGRANGE|INSTROP_UNALIGNED);
    11311135        else // if VGPRS as destination
    11321136            good &= parseVRegRange(asmr, linePtr, dstReg,
     
    12711275    cxbyte modifiers = 0;
    12721276   
    1273     good &= parseSRegRange(asmr, linePtr, dstReg, arch, 2);
     1277    good &= parseSRegRange(asmr, linePtr, dstReg, arch, 2, true,
     1278                           INSTROP_SYMREGRANGE|INSTROP_UNALIGNED);
    12741279    if (!skipRequiredComma(asmr, linePtr))
    12751280        return;
     
    14491454        else // SGPRS as dest
    14501455            good &= parseSRegRange(asmr, linePtr, dstReg, arch,
    1451                                    (gcnInsn.mode&GCN_REG_DST_64)?2:1);
     1456                       (gcnInsn.mode&GCN_REG_DST_64)?2:1, true,
     1457                       INSTROP_SYMREGRANGE|INSTROP_UNALIGNED);
    14521458        if (!skipRequiredComma(asmr, linePtr))
    14531459            return;
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc11.cpp

    r1775 r1776  
    724724    { "    v_sub_i32  v55, s[10:11], s27, -v90",
    725725        0xd24c0a37U, 0x4002b41bU, true, true, "" },
     726    { "    v_sub_i32  v55, s[11:12], s27, -v90",
     727        0xd24c0b37U, 0x4002b41bU, true, true, "" },
    726728    { "    v_subrev_i32  v154, vcc, v21, v107", 0x4f34d715U, 0, false, true, "" },
    727729    { "    v_subrev_i32  v55, s[10:11], s27, -v90",
     
    738740        "test.s:1:34: Error: Expected operator\n"
    739741        "test.s:1:35: Error: Expected ',' before argument\n" },
    740     { "    v_add_i32  v55, s[11:12], s27, -v90", 0, 0, false, false,
    741         "test.s:1:21: Error: Unaligned scalar register range\n" },
    742742    { "    v_add_i32  v55, s[10:11], s27, v90 clamp", 0, 0, false, false,
    743743        "test.s:1:40: Error: Modifier CLAMP in VOP3B is illegal\n" },
     
    947947    { "    v_cmp_f_f32  vcc, v79, 24", 0xd000006aU, 0x1314fU, true, true, "" },
    948948    { "    v_cmp_f_f32  s[28:29], v79, v201", 0xd000001cU, 0x3934fU, true, true, "" },
     949    { "    v_cmp_f_f32  s[29:30], v79, v201", 0xd000001dU, 0x3934fU, true, true, "" },
    949950    { "    v_cmp_f_f32  vcc, 10.5332, v201", 0x7c0192ffU, 0x412887fd, true, true, "" },
    950951    { "    v_cmp_f_f32  vcc, s8, s8", 0xd000006aU, 0x1008U, true, true, "" },
    951952    /* VOPC errors */
    952     { "    v_cmp_f_f32  s[29:30], v79, v201", 0, 0, false, false,
    953         "test.s:1:18: Error: Unaligned scalar register range\n" },
    954953    { "    v_cmp_f_f32  vcc_lo, v79, v201", 0, 0, false, false,
    955954        "test.s:1:18: Error: Required 2 scalar registers\n" },
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