Changeset 3147 in CLRX


Ignore:
Timestamp:
Jun 9, 2017, 5:16:01 AM (2 years ago)
Author:
matszpk
Message:

CLRadeonExtender: CLRXDocs: Fixed typos. Add extra info about S_STORE_* and S_BUFFER_STORE_*.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/doc/GcnInstrsSmem.md

    r3146 r3147  
    11## GCN ISA SMEM instructions (GCN 1.2)
    22
    3 The basic encoding of the SMEM instructions needs 9 bytes (2 dwords). List of fields:
     3The encoding of the SMEM instructions needs 8 bytes (2 dwords). List of fields:
    44
    55Bits  | Name     | Description
     
    1919
    2020For S_LOAD_DWORD\* instructions, 2 SBASE SGPRs holds an base 48-bit address and a
    21 16-bit size.
    22 For S_BUFFER_LOAD_DWORD\* instructions, 4 SBASE SGPRs holds a buffer descriptor.
    23 In this case, SBASE must be a multipla of 2.
     2116-bit size. For S_BUFFER_LOAD_DWORD\* instructions, 4 SBASE SGPRs holds a
     22buffer descriptor. In this case, SBASE must be a multipla of 2.
     23S_STORE_\* and S_BUFFER_STORE_\* accepts only M0 as offset register.
    2424
    2525The SMEM instructions can return the result data out of the order. Any SMEM operation
Note: See TracChangeset for help on using the changeset viewer.