Changeset 3662 in CLRX


Ignore:
Timestamp:
Jan 26, 2018, 5:13:42 PM (3 years ago)
Author:
matszpk
Message:

CLRadeonExtender: ROCm: Add eflags support (allow to set or get various e_flags value in ELF header).

Location:
CLRadeonExtender/trunk
Files:
8 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/CLRX/amdasm/Disassembler.h

    r3575 r3662  
    319319    size_t codeSize;    ///< code size
    320320    const cxbyte* code; ///< code
     321    uint32_t eflags;   ///< ELF header e_flags field
    321322};
    322323
  • CLRadeonExtender/trunk/CLRX/amdbin/ROCmBinaries.h

    r3575 r3662  
    174174    std::vector<BinSection> extraSections;  ///< extra sections
    175175    std::vector<BinSymbol> extraSymbols;    ///< extra symbols
     176    uint32_t eflags;    ///< ELF headef e_flags field
    176177   
    177178    /// add empty kernel with default values
  • CLRadeonExtender/trunk/amdasm/AsmROCmFormat.cpp

    r3575 r3662  
    4141    "debug_wavefront_private_segment_offset_sgpr",
    4242    "debugmode", "default_hsa_features", "dims", "dx10clamp",
    43     "exceptions", "fkernel", "floatmode", "gds_segment_size",
     43    "eflags", "exceptions", "fkernel", "floatmode", "gds_segment_size",
    4444    "group_segment_align", "ieeemode", "kcode",
    4545    "kcodeend", "kernarg_segment_align",
     
    7272    ROCMOP_DEBUG_WAVEFRONT_PRIVATE_SEGMENT_OFFSET_SGPR,
    7373    ROCMOP_DEBUGMODE, ROCMOP_DEFAULT_HSA_FEATURES, ROCMOP_DIMS, ROCMOP_DX10CLAMP,
    74     ROCMOP_EXCEPTIONS, ROCMOP_FKERNEL, ROCMOP_FLOATMODE, ROCMOP_GDS_SEGMENT_SIZE,
     74    ROCMOP_EFLAGS, ROCMOP_EXCEPTIONS, ROCMOP_FKERNEL,
     75    ROCMOP_FLOATMODE, ROCMOP_GDS_SEGMENT_SIZE,
    7576    ROCMOP_GROUP_SEGMENT_ALIGN, ROCMOP_IEEEMODE, ROCMOP_KCODE,
    7677    ROCMOP_KCODEEND, ROCMOP_KERNARG_SEGMENT_ALIGN,
     
    352353}
    353354
     355void AsmROCmPseudoOps::setEFlags(AsmROCmHandler& handler, const char* linePtr)
     356{
     357    Assembler& asmr = handler.assembler;
     358    const char* end = asmr.line + asmr.lineSize;
     359    skipSpacesToEnd(linePtr, end);
     360    uint64_t value;
     361    const char* valuePlace = linePtr;
     362    if (!getAbsoluteValueArg(asmr, value, linePtr, true))
     363        return;
     364    asmr.printWarningForRange(sizeof(uint32_t)<<3, value,
     365                 asmr.getSourcePos(valuePlace), WS_UNSIGNED);
     366    if (!checkGarbagesAtEnd(asmr, linePtr))
     367        return;
     368    handler.output.eflags = value;
     369}
    354370   
    355371void AsmROCmPseudoOps::doConfig(AsmROCmHandler& handler, const char* pseudoOpPlace,
     
    11411157            AsmROCmPseudoOps::setConfigBoolValue(*this, stmtPlace, linePtr,
    11421158                             ROCMCVAL_DX10CLAMP);
     1159            break;
     1160        case ROCMOP_EFLAGS:
     1161            AsmROCmPseudoOps::setEFlags(*this, linePtr);
    11431162            break;
    11441163        case ROCMOP_EXCEPTIONS:
  • CLRadeonExtender/trunk/amdasm/AsmROCmInternals.h

    r3575 r3662  
    9292    // .arch_stepping
    9393    static void setArchStepping(AsmROCmHandler& handler, const char* linePtr);
     94    // set elf elfags
     95    static void setEFlags(AsmROCmHandler& handler, const char* linePtr);
    9496   
    9597    /* user configuration pseudo-ops */
  • CLRadeonExtender/trunk/amdasm/DisasmROCm.cpp

    r3575 r3662  
    5353    }
    5454    // setup code
     55    input->eflags = ULEV(binary.getHeader().e_flags);
    5556    input->code = binary.getCode();
    5657    input->codeSize = binary.getCodeSize();
     
    516517    const cxuint maxSgprsNum = getGPUMaxRegistersNum(arch, REGTYPE_SGPR, 0);
    517518   
     519    if (rocmInput->eflags != 0)
     520    {
     521        // print eflags if not zero
     522        char buf[40];
     523        size_t size = snprintf(buf, 40, ".eflags %u\n", rocmInput->eflags);
     524        output.write(buf, size);
     525    }
     526   
    518527    {
    519528        // print AMD architecture version
  • CLRadeonExtender/trunk/amdbin/ROCmBinaries.cpp

    r3660 r3662  
    291291   
    292292    ElfBinaryGen64 elfBinGen64({ 0U, 0U, 0x40, 0, ET_DYN,
    293         0xe0, EV_CURRENT, UINT_MAX, 0, 0 }, true, true, true, PHREGION_FILESTART);
     293            0xe0, EV_CURRENT, UINT_MAX, 0, input->eflags },
     294            true, true, true, PHREGION_FILESTART);
    294295    // add symbols (kernels, function kernels and data symbols)
    295296    elfBinGen64.addSymbol(ElfSymbol64("_DYNAMIC", 5,
  • CLRadeonExtender/trunk/tests/amdasm/AsmROCmFormat.cpp

    r3575 r3662  
    126126    os << "  Code:\n";
    127127    printHexData(os, 1, output->codeSize, output->code);
     128    if (output->eflags != 0)
     129        os << "  EFlags=" << output->eflags << std::endl;
    128130   
    129131    // print extra sections if supplied
     
    478480test.s:21:19: Warning: Value 0xaa1fd3da2313 truncated to 0xd3da2313
    479481)ffDXD", false
     482    },
     483    {   // different eflags
     484        R"ffDXD(.rocm
     485        .gpu Fiji
     486        .eflags 3
     487.kernel kxx1
     488    .config
     489        .dims x
     490        .codeversion 1,0
     491        .call_convention 0x34dac
     492        .debug_private_segment_buffer_sgpr 98
     493        .debug_wavefront_private_segment_offset_sgpr 96
     494        .gds_segment_size 100
     495        .kernarg_segment_align 32
     496        .workgroup_group_segment_size 22
     497        .workgroup_fbarrier_count 3324
     498        .dx10clamp
     499        .exceptions 10
     500        .private_segment_align 128
     501        .privmode
     502        .reserved_sgprs 5,14
     503        .runtime_loader_kernel_symbol 0x4dc98b3a
     504        .scratchbuffer 77222
     505        .reserved_sgprs 9,12
     506        .reserved_vgprs 7,17
     507        .private_elem_size 16
     508    .control_directive
     509        .int 1,2,3
     510        .fill 116,1,0
     511.text
     512kxx1:
     513        .skip 256
     514        s_mov_b32 s7, 0
     515        s_endpgm
     516)ffDXD",
     517        R"ffDXD(ROCmBinDump:
     518  ROCmSymbol: name=kxx1, offset=0, size=0, type=kernel
     519    Config:
     520      amdCodeVersion=1.1
     521      amdMachine=1:8:0:3
     522      kernelCodeEntryOffset=256
     523      kernelCodePrefetchOffset=0
     524      kernelCodePrefetchSize=0
     525      maxScrachBackingMemorySize=0
     526      computePgmRsrc1=0x3c0040
     527      computePgmRsrc2=0xa008081
     528      enableSgprRegisterFlags=0x0
     529      enableFeatureFlags=0x6
     530      workitemPrivateSegmentSize=77222
     531      workgroupGroupSegmentSize=22
     532      gdsSegmentSize=100
     533      kernargSegmentSize=0
     534      workgroupFbarrierCount=3324
     535      wavefrontSgprCount=10
     536      workitemVgprCount=1
     537      reservedVgprFirst=7
     538      reservedVgprCount=11
     539      reservedSgprFirst=9
     540      reservedSgprCount=4
     541      debugWavefrontPrivateSegmentOffsetSgpr=96
     542      debugPrivateSegmentBufferSgpr=98
     543      kernargSegmentAlignment=5
     544      groupSegmentAlignment=4
     545      privateSegmentAlignment=7
     546      wavefrontSize=6
     547      callConvention=0x34dac
     548      runtimeLoaderKernelSymbol=0x4dc98b3a
     549      ControlDirective:
     550      0100000002000000030000000000000000000000000000000000000000000000
     551      0000000000000000000000000000000000000000000000000000000000000000
     552      0000000000000000000000000000000000000000000000000000000000000000
     553      0000000000000000000000000000000000000000000000000000000000000000
     554  Comment:
     555  nullptr
     556  Code:
     557  0100000000000000010008000000030000010000000000000000000000000000
     558  0000000000000000000000000000000040003c008180000a00000600a62d0100
     559  16000000640000000000000000000000fc0c00000a00010007000b0009000400
     560  6000620005040706ac4d03000000000000000000000000003a8bc94d00000000
     561  0100000002000000030000000000000000000000000000000000000000000000
     562  0000000000000000000000000000000000000000000000000000000000000000
     563  0000000000000000000000000000000000000000000000000000000000000000
     564  0000000000000000000000000000000000000000000000000000000000000000
     565  800087be000081bf
     566  EFlags=3
     567)ffDXD", "", true
    480568    }
    481569};
  • CLRadeonExtender/trunk/tests/amdbin/ROCmBinGen.cpp

    r3575 r3662  
    3737    uint32_t archMajor = 0;
    3838    ROCmInput rocmInput;
     39    rocmInput.eflags = ULEV(binary.getHeader().e_flags);
    3940    // try to get comment
    4041    try
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