Changeset 3825 in CLRX

Feb 19, 2018, 6:28:43 PM (16 months ago)

CLRadeonExtender: Update ChangeLog?.

1 edited


  • CLRadeonExtender/trunk/ChangeLog

    r3548 r3825  
    22Change Log
     4CLRadeonExtender 0.1.7:
     6* update AmdCL2ABI chapter
     7* fixed kernel arguments sizes in GalliumCompute binary format
     8* add new GPU devices gfx902-gfx905
     9* update device tables for Amd Crimson drivers
     10* small fixes in DynLibrary interface
     11* add relocations to GalliumCompute binary format (for scratch buffer symbols)
     12* make getXXXDisasmInputFromBinaryXX as public interface
     13* speeding up evaluation of simple expressions without symbols
     14* add '.for' and '.while' pseudo-ops ('for' and 'while' loops)
     15* fixed some grammar/typos in CLRX documentation
     16* add GPU device names from ROCm-OpenCL
     17* handle new ROCm binary format with YAML metadatas (assembler and disassembler)
     18* add few pseudo-ops to ROCm handling
     19* add new pseudo-ops to set parameters in ROCm YAML metadata
     20* fixes in GalliumCompute binary generator (for conformant with standards)
     21* add '.reqd_work_group_size' pseudo-op (equivalent of '.cws')
     22* add support for work_group_size_hint and vec_type hint in Amd OpenCL 2.0 binary format
     23* some small bug fixes in ROCm disassembler
     24* updates in and INSTALL files
     25* small sanitizations in DisasmAmd, DisasmAmdCL2 (argument type checking)
     26* change behaviour of '.cws' (.reqd_work_group_size) while setting default values
     27* add calculation of section differences in an expressions (for ROCm handling)
     28* fixed invalid reads (potential segfault) after undefining symbol
     29* fixed old stupid bug: resolve symbol value by using new value (or just if undefined then
     30  do not resolve symbol) instead old unresolved symbol value later when expression
     31  has been evaluated
     32* Add GOT table handling in ROCm binary format
     33* add new option '--newROCmBinFormat'
     34* add untested support for ROCm in CLHelper and VectorAdd sample
     35* add support for multiple OpenCL platforms in CLHelper and samples
     36* allow te call_convetion to 0xffffffff in AMDHSA config
     37* handle special cases with relatives while evaluating binary/logical operators
     38* small fixes in CLRX documentation and Unix manuals
     39* developing unfinished AsmRegAlloc
    441CLRadeonExtender 0.1.6:
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