Changeset 4700 in CLRX


Ignore:
Timestamp:
Jun 24, 2019, 10:13:00 PM (10 months ago)
Author:
matszpk
Message:

CLRadeonExtender: Fixed GPUId routines. GCNDisasm: First tests for GFX 10 instructions.

Location:
CLRadeonExtender/trunk
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/tests/amdasm/GCNDisasmOpc15.cpp

    r4698 r4700  
    2424const GCNDisasmOpcodeCase decGCNOpcodeGCN15Cases[] =
    2525{
     26    { 0x80153d04U, 0, false, "        s_add_u32       s21, s4, s61\n" },
     27    { 0x80156404U, 0, false, "        s_add_u32       s21, s4, s100\n" },
     28    { 0x80156604U, 0, false, "        s_add_u32       s21, s4, s102\n" },
     29    { 0x80156704U, 0, false, "        s_add_u32       s21, s4, s103\n" },
     30    { 0x80156804U, 0, false, "        s_add_u32       s21, s4, s104\n" },
     31    { 0x80156904U, 0, false, "        s_add_u32       s21, s4, s105\n" },
    2632    { 0, 0, false, nullptr }
    2733};
  • CLRadeonExtender/trunk/utils/GPUId.cpp

    r4686 r4700  
    293293        if (archMask&(3U<<int(GPUArchitecture::GCN1_4)))
    294294            return 104;    // for VEGA
    295         if (archMask&(2U<<int(GPUArchitecture::GCN1_5)))
     295        if (archMask&(3U<<int(GPUArchitecture::GCN1_5)))
    296296            return 106;    // for NAVI
    297297        return (archMask&(1U<<int(GPUArchitecture::GCN1_2))) ? 102 : 104;
     
    306306        if (archMask&(3U<<int(GPUArchitecture::GCN1_4)))
    307307            return 102;    // for VEGA
    308         if (archMask&(2U<<int(GPUArchitecture::GCN1_5)))
     308        if (archMask&(3U<<int(GPUArchitecture::GCN1_5)))
    309309            return 106;    // for NAVI
    310310        return (archMask&(1U<<int(GPUArchitecture::GCN1_2))) ? 102 : 104;
     
    318318        return true;
    319319    // TODO: add stuff for Navi
    320     if ((archMask & 2U<<int(GPUArchitecture::GCN1_5)) != 0)
     320    if ((archMask & 3U<<int(GPUArchitecture::GCN1_5)) != 0)
    321321        return false;  // no other special registers
    322322    if ((archMask&(31U<<int(GPUArchitecture::GCN1_1))) != 0)
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