Changeset 4797 in CLRX


Ignore:
Timestamp:
Jul 17, 2019, 4:25:56 PM (5 months ago)
Author:
matszpk
Message:

CLRadeonExtender: GCNAsm: Add SOPK instructions testcases for GFX10. Add new HWREG for GFX10. Add aliases: tba_lo, tba_hi, tma_lo, tma_hi.

Location:
CLRadeonExtender/trunk
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/amdasm/GCNAsmEncode1.cpp

    r4796 r4797  
    271271    { "sq_shader_tma_lo", 18 },
    272272    { "status", 2 },
     273    { "tba_hi", 17 },
     274    { "tba_lo", 16 },
     275    { "tma_hi", 19 },
     276    { "tma_lo", 18 },
    273277    { "trapsts", 3 }
    274278};
    275279
    276280static const size_t hwregNamesGCN14MapSize = sizeof(hwregNamesGCN14Map) /
     281            sizeof(std::pair<const char*, uint16_t>);
     282
     283// update SGPR counting and VCC usage (regflags) for GCN 1.4 (VEGA)
     284static const std::pair<const char*, cxuint> hwregNamesGCN15Map[] =
     285{
     286    { "flat_scr_hi", 21 },
     287    { "flat_scr_lo", 20 },
     288    { "flush_ib", 14 },
     289    { "gpr_alloc", 5 },
     290    { "hw_id", 4 },
     291    { "ib_dbg0", 12 },
     292    { "ib_dbg1", 13 },
     293    { "ib_sts", 7 },
     294    { "inst_dw0", 10 },
     295    { "inst_dw1", 11 },
     296    { "lds_alloc", 6 },
     297    { "mode", 1 },
     298    { "pc_hi", 9 },
     299    { "pc_lo", 8 },
     300    { "pops_packer", 23 },
     301    { "sh_mem_bases", 15 },
     302    { "sq_shader_tba_hi", 17 },
     303    { "sq_shader_tba_lo", 16 },
     304    { "sq_shader_tma_hi", 19 },
     305    { "sq_shader_tma_lo", 18 },
     306    { "status", 2 },
     307    { "tba_hi", 17 },
     308    { "tba_lo", 16 },
     309    { "tma_hi", 19 },
     310    { "tma_lo", 18 },
     311    { "trapsts", 3 },
     312    { "xnack_mask", 22 },
     313};
     314
     315static const size_t hwregNamesGCN15MapSize = sizeof(hwregNamesGCN15Map) /
    277316            sizeof(std::pair<const char*, uint16_t>);
    278317
     
    287326    GCNAssembler* gcnAsm = static_cast<GCNAssembler*>(asmr.isaAssembler);
    288327    const bool isGCN14 = (arch & ARCH_GCN_1_4)!=0;
     328    const bool isGCN15 = (arch & ARCH_GCN_1_5)!=0;
    289329   
    290330    gcnAsm->setCurrentRVU(0);
     
    352392            const char* hwregNamePlace = linePtr;
    353393            // choose hwReg names map
    354             const size_t regMapSize = isGCN14 ? hwregNamesGCN14MapSize : hwregNamesMapSize;
    355             const std::pair<const char*, cxuint>* regMap = isGCN14 ?
    356                         hwregNamesGCN14Map : hwregNamesMap;
     394            const size_t regMapSize = isGCN15 ? hwregNamesGCN15MapSize :
     395                        (isGCN14 ? hwregNamesGCN14MapSize : hwregNamesMapSize);
     396            const std::pair<const char*, cxuint>* regMap = isGCN15 ? hwregNamesGCN15Map :
     397                        (isGCN14 ? hwregNamesGCN14Map : hwregNamesMap);
    357398            good &= getEnumeration(asmr, linePtr, "HWRegister",
    358399                        regMapSize, regMap, hwregId, "hwreg_");
    359             if (good && (arch & ARCH_GCN_1_2_4) == 0 && hwregId == 13)
     400            if (good && (arch & ARCH_GCN_1_2_4_5) == 0 && hwregId == 13)
    360401                // if ib_dgb1 in not GCN 1.2
    361402                ASM_NOTGOOD_BY_ERROR(hwregNamePlace, "Unknown HWRegister")
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc14.cpp

    r4789 r4797  
    143143                0xb8ab0013U, 0, false, true, "" },
    144144    { "    s_getreg_b32    s43, hwreg(HWREG_SQ_SHADER_TMA_HI, 0, 1)",
     145                0xb8ab0013U, 0, false, true, "" },
     146    { "    s_getreg_b32    s43, hwreg(tba_lo, 0, 1)", 0xb8ab0010U, 0, false, true, "" },
     147    { "    s_getreg_b32    s43, hwreg(HWREG_TBA_LO, 0, 1)",
     148                0xb8ab0010U, 0, false, true, "" },
     149    { "    s_getreg_b32    s43, hwreg(tba_hi, 0, 1)", 0xb8ab0011U, 0, false, true, "" },
     150    { "    s_getreg_b32    s43, hwreg(HWREG_TBA_HI, 0, 1)",
     151                0xb8ab0011U, 0, false, true, "" },
     152    { "    s_getreg_b32    s43, hwreg(tma_lo, 0, 1)", 0xb8ab0012U, 0, false, true, "" },
     153    { "    s_getreg_b32    s43, hwreg(HWREG_TMA_LO, 0, 1)",
     154                0xb8ab0012U, 0, false, true, "" },
     155    { "    s_getreg_b32    s43, hwreg(tma_hi, 0, 1)", 0xb8ab0013U, 0, false, true, "" },
     156    { "    s_getreg_b32    s43, hwreg(HWREG_TMA_HI, 0, 1)",
    145157                0xb8ab0013U, 0, false, true, "" },
    146158    /* message types */
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc15.cpp

    r4796 r4797  
    287287    /* SOPK */
    288288    { "    s_movk_i32  s43, 0xd3b9", 0xb02bd3b9U, 0, false, true, "" },
     289    { "xc = 0xd4ba\n    s_movk_i32  s43, xc", 0xb02bd4baU, 0, false, true, "" },
     290    { "    s_movk_i32  s43, xc; xc = 0xd4ba", 0xb02bd4baU, 0, false, true, "" },
     291    { "xc = 0x11d4ba\n    s_movk_i32  s43, xc", 0xb02bd4baU, 0, false, true,
     292        "test.s:2:22: Warning: Value 0x11d4ba truncated to 0xd4ba\n" },
     293    { "    s_movk_i32  s43, xc; xc = 0x22d4ba", 0xb02bd4baU, 0, false, true,
     294        "test.s:1:22: Warning: Value 0x22d4ba truncated to 0xd4ba\n" },
    289295    { "    s_version 4331", 0xb08010ebU, 0, false, true, "" },
     296    { "    s_cmovk_i32  s43, 0xd3b9", 0xb12bd3b9U, 0, false, true, "" },
     297    { "    s_cmpk_eq_i32  s43, 0xd3b9", 0xb1abd3b9U, 0, false, true, "" },
     298    { "    s_cmpk_lg_i32  s43, 0xd3b9", 0xb22bd3b9U, 0, false, true, "" },
     299    { "    s_cmpk_gt_i32  s43, 0xd3b9", 0xb2abd3b9U, 0, false, true, "" },
     300    { "    s_cmpk_ge_i32  s43, 0xd3b9", 0xb32bd3b9U, 0, false, true, "" },
     301    { "    s_cmpk_lt_i32  s43, 0xd3b9", 0xb3abd3b9U, 0, false, true, "" },
     302    { "    s_cmpk_le_i32  s43, 0xd3b9", 0xb42bd3b9U, 0, false, true, "" },
     303    { "    s_cmpk_eq_u32  s43, 0xd3b9", 0xb4abd3b9U, 0, false, true, "" },
     304    { "    s_cmpk_lg_u32  s43, 0xd3b9", 0xb52bd3b9U, 0, false, true, "" },
     305    { "    s_cmpk_gt_u32  s43, 0xd3b9", 0xb5abd3b9U, 0, false, true, "" },
     306    { "    s_cmpk_ge_u32  s43, 0xd3b9", 0xb62bd3b9U, 0, false, true, "" },
     307    { "    s_cmpk_lt_u32  s43, 0xd3b9", 0xb6abd3b9U, 0, false, true, "" },
     308    { "    s_cmpk_le_u32  s43, 0xd3b9", 0xb72bd3b9U, 0, false, true, "" },
     309    { "    s_addk_i32  s43, 0xd3b9", 0xb7abd3b9U, 0, false, true, "" },
     310    { "    s_mulk_i32  s43, 0xd3b9", 0xb82bd3b9U, 0, false, true, "" },
     311    { "    s_cbranch_i_fork s[44:45], xxxx-8\nxxxx:\n", 0, 0, false, false,
     312        "test.s:1:5: Error: Unknown instruction\n" },
     313    { "    s_getreg_b32    s43, hwreg(mode, 0, 1)", 0xb92b0001U, 0, false, true, "" },
     314    { "    s_getreg_b32    s43, hwreg  (mode, 0, 1)", 0xb92b0001U, 0, false, true, "" },
     315    { "    s_getreg_b32    s43, hwreg  (mode  ,   0  , 1  )",
     316                    0xb92b0001U, 0, false, true, "" },
     317    { "    s_getreg_b32    s43, hwreg(HWREG_MODE, 0, 1)", 0xb92b0001U, 0, false, true, "" },
     318    { "    s_getreg_b32    s43, hwreg(status, 0, 1)", 0xb92b0002U, 0, false, true, "" },
     319    { "    s_getreg_b32    s43, hwreg(HWREG_STATUS, 0, 1)",
     320        0xb92b0002U, 0, false, true, "" },
     321    { "    s_getreg_b32    s43, hwreg(trapsts, 0, 1)", 0xb92b0003U, 0, false, true, "" },
     322    { "    s_getreg_b32    s43, hwreg(HWREG_TRAPSTS, 0, 1)",
     323                    0xb92b0003U, 0, false, true, "" },
     324    { "    s_getreg_b32    s43, hwreg(hw_id, 0, 1)", 0xb92b0004U, 0, false, true, "" },
     325    { "    s_getreg_b32    s43, hwreg(HWREG_HW_ID, 0, 1)",
     326                    0xb92b0004U, 0, false, true, "" },
     327    { "    s_getreg_b32    s43, hwreg(gpr_alloc, 0, 1)", 0xb92b0005U, 0, false, true, "" },
     328    { "    s_getreg_b32    s43, hwreg(HWREG_GPR_ALLOC, 0, 1)",
     329                    0xb92b0005U, 0, false, true, "" },
     330    { "    s_getreg_b32    s43, hwreg(lds_alloc, 0, 1)", 0xb92b0006U, 0, false, true, "" },
     331    { "    s_getreg_b32    s43, hwreg(HWREG_LDS_ALLOC, 0, 1)",
     332                    0xb92b0006U, 0, false, true, "" },
     333    { "    s_getreg_b32    s43, hwreg(ib_sts, 0, 1)", 0xb92b0007U, 0, false, true, "" },
     334    { "    s_getreg_b32    s43, hwreg(HWREG_IB_STS, 0, 1)",
     335                    0xb92b0007U, 0, false, true, "" },
     336    { "    s_getreg_b32    s43, hwreg(pc_lo, 0, 1)", 0xb92b0008U, 0, false, true, "" },
     337    { "    s_getreg_b32    s43, hwreg(HWREG_PC_LO, 0, 1)",
     338                    0xb92b0008U, 0, false, true, "" },
     339    { "    s_getreg_b32    s43, hwreg(pc_hi, 0, 1)", 0xb92b0009U, 0, false, true, "" },
     340    { "    s_getreg_b32    s43, hwreg(HWREG_PC_HI, 0, 1)",
     341                    0xb92b0009U, 0, false, true, "" },
     342    { "    s_getreg_b32    s43, hwreg(inst_dw0, 0, 1)", 0xb92b000aU, 0, false, true, "" },
     343    { "    s_getreg_b32    s43, hwreg(HWREG_INST_DW0, 0, 1)",
     344                    0xb92b000aU, 0, false, true, "" },
     345    { "    s_getreg_b32    s43, hwreg(inst_dw1, 0, 1)", 0xb92b000bU, 0, false, true, "" },
     346    { "    s_getreg_b32    s43, hwreg(HWREG_INST_DW1, 0, 1)",
     347                    0xb92b000bU, 0, false, true, "" },
     348    { "    s_getreg_b32    s43, hwreg(ib_dbg0, 0, 1)", 0xb92b000cU, 0, false, true, "" },
     349    { "    s_getreg_b32    s43, hwreg(HWREG_IB_DBG0, 0, 1)",
     350                    0xb92b000cU, 0, false, true, "" },
     351    { "    s_getreg_b32    s43, hwreg(trapsts, 10, 1)", 0xb92b0283u, 0, false, true, "" },
     352    { "    s_getreg_b32    s43, hwreg(trapsts, 3, 10)", 0xb92b48c3u, 0, false, true, "" },
     353    { "    s_getreg_b32    s43, hwreg(trapsts, 3, 32)", 0xb92bf8c3u, 0, false, true, "" },
     354    { "    s_getreg_b32    s43, hwreg(@10, 0, 1)", 0xb92b000aU, 0, false, true, "" },
     355    { "    s_getreg_b32    s43, hwreg(@8, 0, 1)", 0xb92b0008U, 0, false, true, "" },
     356    { "    s_setreg_imm32_b32 hwreg(trapsts, 3, 10), 0x24da4f",
     357                    0xba8048c3u, 0x24da4fU, true, true, "" },
     358    { "    s_setreg_imm32_b32 hwreg(trapsts, 3, 10), xx; xx=0x24da4f",
     359                    0xba8048c3u, 0x24da4fU, true, true, "" },
     360    { "xx=0x24da4e;    s_setreg_imm32_b32 hwreg(trapsts, 3, 10), xx",
     361                    0xba8048c3u, 0x24da4eU, true, true, "" },
     362    { "     s_setreg_b32  hwreg(trapsts, 3, 10), s43", 0xb9ab48c3u, 0, false, true, "" },
     363    { "    s_getreg_b32    s43, hwreg(ib_dbg1, 0, 1)", 0xb92b000dU, 0, false, true, "" },
     364    { "    s_getreg_b32    s43, hwreg(flush_ib, 0, 1)", 0xb92b000eU, 0, false, true, "" },
     365    { "    s_getreg_b32    s43, hwreg(HWREG_FLUSH_IB, 0, 1)",
     366                0xb92b000eU, 0, false, true, "" },
     367    { "    s_getreg_b32    s43, hwreg(sh_mem_bases, 0, 1)",
     368                0xb92b000fU, 0, false, true, "" },
     369    { "    s_getreg_b32    s43, hwreg(HWREG_SH_MEM_BASES, 0, 1)",
     370                0xb92b000fU, 0, false, true, "" },
     371    { "    s_getreg_b32    s43, hwreg(sq_shader_tba_lo, 0, 1)",
     372                0xb92b0010U, 0, false, true, "" },
     373    { "    s_getreg_b32    s43, hwreg(HWREG_SQ_SHADER_TBA_LO, 0, 1)",
     374                0xb92b0010U, 0, false, true, "" },
     375    { "    s_getreg_b32    s43, hwreg(sq_shader_tba_hi, 0, 1)",
     376                0xb92b0011U, 0, false, true, "" },
     377    { "    s_getreg_b32    s43, hwreg(HWREG_SQ_SHADER_TBA_HI, 0, 1)",
     378                0xb92b0011U, 0, false, true, "" },
     379    { "    s_getreg_b32    s43, hwreg(sq_shader_tma_lo, 0, 1)",
     380                0xb92b0012U, 0, false, true, "" },
     381    { "    s_getreg_b32    s43, hwreg(HWREG_SQ_SHADER_TMA_LO, 0, 1)",
     382                0xb92b0012U, 0, false, true, "" },
     383    { "    s_getreg_b32    s43, hwreg(sq_shader_tma_hi, 0, 1)",
     384                0xb92b0013U, 0, false, true, "" },
     385    { "    s_getreg_b32    s43, hwreg(HWREG_SQ_SHADER_TMA_HI, 0, 1)",
     386                0xb92b0013U, 0, false, true, "" },
     387    { "    s_getreg_b32    s43, hwreg(tba_lo, 0, 1)", 0xb92b0010U, 0, false, true, "" },
     388    { "    s_getreg_b32    s43, hwreg(HWREG_TBA_LO, 0, 1)",
     389                0xb92b0010U, 0, false, true, "" },
     390    { "    s_getreg_b32    s43, hwreg(tba_hi, 0, 1)", 0xb92b0011U, 0, false, true, "" },
     391    { "    s_getreg_b32    s43, hwreg(HWREG_TBA_HI, 0, 1)",
     392                0xb92b0011U, 0, false, true, "" },
     393    { "    s_getreg_b32    s43, hwreg(tma_lo, 0, 1)", 0xb92b0012U, 0, false, true, "" },
     394    { "    s_getreg_b32    s43, hwreg(HWREG_TMA_LO, 0, 1)",
     395                0xb92b0012U, 0, false, true, "" },
     396    { "    s_getreg_b32    s43, hwreg(tma_hi, 0, 1)", 0xb92b0013U, 0, false, true, "" },
     397    { "    s_getreg_b32    s43, hwreg(HWREG_TMA_HI, 0, 1)",
     398                0xb92b0013U, 0, false, true, "" },
     399    { "    s_getreg_b32    s43, hwreg(flat_scr_lo, 0, 1)",
     400                0xb92b0014U, 0, false, true, "" },
     401    { "    s_getreg_b32    s43, hwreg(HWREG_FLAT_SCR_LO, 0, 1)",
     402                0xb92b0014U, 0, false, true, "" },
     403    { "    s_getreg_b32    s43, hwreg(flat_scr_hi, 0, 1)",
     404                0xb92b0015U, 0, false, true, "" },
     405    { "    s_getreg_b32    s43, hwreg(HWREG_FLAT_SCR_HI, 0, 1)",
     406                0xb92b0015U, 0, false, true, "" },
     407    { "    s_getreg_b32    s43, hwreg(xnack_mask, 0, 1)",
     408                0xb92b0016U, 0, false, true, "" },
     409    { "    s_getreg_b32    s43, hwreg(HWREG_XNACK_MASK, 0, 1)",
     410                0xb92b0016U, 0, false, true, "" },
     411    { "    s_getreg_b32    s43, hwreg(pops_packer, 0, 1)",
     412                0xb92b0017U, 0, false, true, "" },
     413    { "    s_getreg_b32    s43, hwreg(HWREG_POPS_PACKER, 0, 1)",
     414                0xb92b0017U, 0, false, true, "" },
    290415    { nullptr, 0, 0, false, false, 0 }
    291416};
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