Changeset 4813 in CLRX


Ignore:
Timestamp:
Jul 19, 2019, 8:17:10 PM (4 weeks ago)
Author:
matszpk
Message:

CLRadeonExtender: GCNAsm: Add VOP2 instructions testcases for GFX10. Add missing testcases for VOP3B add/sub instructions.

Location:
CLRadeonExtender/trunk/tests/amdasm
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc11.cpp

    r4812 r4813  
    866866    { "    v_addc_u32 v55, s[6:7], v27, -v90, s[24:25]\n",
    867867            0xd2500637U, 0x4062b51bU, true, true, "" },
     868    { "    v_subb_u32 v55, s[6:7], v27, -v90, s[24:25]\n",
     869            0xd2520637U, 0x4062b51bU, true, true, "" },
     870    { "    v_subbrev_u32 v55, s[6:7], v27, -v90, s[24:25]\n",
     871            0xd2540637U, 0x4062b51bU, true, true, "" },
    868872    /* VOP3B errors */
    869873    { "    v_add_i32  v55, s[10:11], s27, abs(v90)", 0, 0, false, false,
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc12.cpp

    r4768 r4813  
    666666    { "    v_subb_u32  v154, vcc, v21, v107, vcc", 0x3b34d715U, 0, false, true, "" },
    667667    { "    v_subbrev_u32  v154, vcc, v21, v107, vcc", 0x3d34d715U, 0, false, true, "" },
     668    { "    v_addc_u32  v154, s[10:11], v21, v107, s[6:7]",
     669        0xd11c0a9aU, 0x001ad715, true, true, "" },
     670    { "    v_subb_u32  v154, s[10:11], v21, v107, s[6:7]",
     671        0xd11d0a9aU, 0x001ad715, true, true, "" },
     672    { "    v_subbrev_u32  v154, s[10:11], v21, v107, s[6:7]",
     673        0xd11e0a9aU, 0x001ad715, true, true, "" },
    668674    { "    v_add_f16  v154, v21, v107", 0x3f34d715U, 0, false, true, "" },
    669675    { "    v_add_f16  v154, 1.374, v107", 0x3f34d6ffU, 0x3d7f, true, true, "" },
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc15.cpp

    r4812 r4813  
    12531253    { "    v_subrev_nc_u32  v154, v21, v107", 0x4f34d715U, 0, false, true, "" },
    12541254    { "    v_subrev_nc_u32  v55, s27, -v90", 0xd5270037U, 0x4002b41bU, true, true, "" },
     1255    { "    v_addc_u32  v154, vcc, v21, v107, vcc", 0x5134d715U, 0, false, true, "" },
     1256    { "    v_addc_u32  v154, vcc[0:1], v21, v107, vcc[0:1]",
     1257        0x5134d715U, 0, false, true, "" },
     1258    { "    v_addc_u32_e32  v154, vcc, v21, v107, vcc", 0x5134d715U, 0, false, true, "" },
     1259    { "    v_add_co_ci_u32  v154, vcc, v21, v107, vcc", 0x5134d715U, 0, false, true, "" },
     1260    { "    v_add_co_ci_u32  v154, vcc[0:1], v21, v107, vcc[0:1]",
     1261        0x5134d715U, 0, false, true, "" },
     1262    { "    v_add_co_ci_u32_e32  v154, vcc, v21, v107, vcc",
     1263        0x5134d715U, 0, false, true, "" },
     1264    { "    v_subb_u32  v154, vcc, v21, v107, vcc", 0x5334d715U, 0, false, true, "" },
     1265    { "    v_subbrev_u32  v154, vcc, v21, v107, vcc", 0x5534d715U, 0, false, true, "" },
     1266    { "    v_sub_co_ci_u32  v154, vcc, v21, v107, vcc", 0x5334d715U, 0, false, true, "" },
     1267    { "    v_subrev_co_ci_u32  v154, vcc, v21, v107, vcc",
     1268        0x5534d715U, 0, false, true, "" },
     1269    { "    v_addc_u32 v55, s[6:7], v27, -v90, s[24:25]\n",
     1270            0xd5280637U, 0x4062b51bU, true, true, "" },
     1271    { "    v_add_co_ci_u32 v55, s[6:7], v27, -v90, s[24:25]\n",
     1272            0xd5280637U, 0x4062b51bU, true, true, "" },
    12551273    { nullptr, 0, 0, false, false, 0 }
    12561274};
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