Changeset 4845 in CLRX


Ignore:
Timestamp:
Jul 26, 2019, 12:29:51 PM (3 weeks ago)
Author:
matszpk
Message:

CLRadeonExtender: GCNAsm: Add DS instruction testcases for GFX10. Add missing "ds_read_u16_d16_hi" in testcases for VEGA.

Location:
CLRadeonExtender/trunk/tests/amdasm
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc14.cpp

    r4797 r4845  
    657657    { "ds_read_u16_d16 v139, v71 offset:52583\n",
    658658        0xd8b4cd67U, 0x8b000047U, true, true, "" },
     659    { "ds_read_u16_d16_hi v139, v71 offset:52583\n",
     660        0xd8b6cd67U, 0x8b000047U, true, true, "" },
    659661    { "ds_read_addtid_b32 v139 offset:52583\n", 0xd96ccd67U, 0x8b000000U, true, true, "" },
    660662    /* MUBUF instructions */
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc15.cpp

    r4844 r4845  
    28302830    { "   ds_max_rtn_f64 v[139:140], v71, v[169:170] offset:52583",
    28312831        0xd9cccd67U, 0x8b00a947U, true, true, "" },
     2832    { "   ds_read_b64  v[139:140], v71 offset:52583",
     2833        0xd9d8cd67U, 0x8b000047U, true, true, "" },
     2834    { "   ds_read2_b64  v[139:142], v71 offset0:103 offset1:205",
     2835        0xd9dccd67U, 0x8b000047U, true, true, "" },
     2836    { "   ds_read2st64_b64 v[139:142], v71 offset0:103 offset1:205",
     2837        0xd9e0cd67U, 0x8b000047U, true, true, "" },
     2838    { "   ds_condxchg32_rtn_b64 v[155:156], v71, v[169:170] offset:52583",
     2839        0xd9f8cd67U, 0x9b00a947U, true, true, "" },
     2840    { "   ds_add_src2_u32 v71 offset:52583", 0xda00cd67U, 0x00000047U, true, true, "" },
     2841    { "   ds_sub_src2_u32 v71 offset:52583", 0xda04cd67U, 0x00000047U, true, true, "" },
     2842    { "   ds_rsub_src2_u32 v71 offset:52583", 0xda08cd67U, 0x00000047U, true, true, "" },
     2843    { "   ds_inc_src2_u32 v71 offset:52583", 0xda0ccd67U, 0x00000047U, true, true, "" },
     2844    { "   ds_dec_src2_u32 v71 offset:52583", 0xda10cd67U, 0x00000047U, true, true, "" },
     2845    { "   ds_min_src2_i32 v71 offset:52583", 0xda14cd67U, 0x00000047U, true, true, "" },
     2846    { "   ds_max_src2_i32 v71 offset:52583", 0xda18cd67U, 0x00000047U, true, true, "" },
     2847    { "   ds_min_src2_u32 v71 offset:52583", 0xda1ccd67U, 0x00000047U, true, true, "" },
     2848    { "   ds_max_src2_u32 v71 offset:52583", 0xda20cd67U, 0x00000047U, true, true, "" },
     2849    { "   ds_and_src2_b32 v71 offset:52583", 0xda24cd67U, 0x00000047U, true, true, "" },
     2850    { "   ds_or_src2_b32 v71 offset:52583", 0xda28cd67U, 0x00000047U, true, true, "" },
     2851    { "   ds_xor_src2_b32 v71 offset:52583", 0xda2ccd67U, 0x00000047U, true, true, "" },
     2852    { "   ds_write_src2_b32 v71 offset:52583", 0xda34cd67U, 0x00000047U, true, true, "" },
     2853    { "   ds_min_src2_f32 v71 offset:52583", 0xda48cd67U, 0x00000047U, true, true, "" },
     2854    { "   ds_max_src2_f32 v71 offset:52583", 0xda4ccd67U, 0x00000047U, true, true, "" },
     2855    { "   ds_add_src2_f32 v71 offset:52583", 0xda54cd67U, 0x00000047U, true, true, "" },
     2856    { "ds_write_b8_d16_hi v71, v169 offset:52583\n",
     2857        0xda80cd67U, 0x0000a947U, true, true, "" },
     2858    { "ds_write_b16_d16_hi v71, v169 offset:52583\n",
     2859        0xda84cd67U, 0x0000a947U, true, true, "" },
     2860    { "ds_read_u8_d16  v139, v71 offset:52583\n",
     2861        0xda88cd67U, 0x8b000047U, true, true, "" },
     2862    { "ds_read_u8_d16_hi v139, v71 offset:52583\n",
     2863        0xda8ccd67U, 0x8b000047U, true, true, "" },
     2864    { "ds_read_i8_d16  v139, v71 offset:52583\n",
     2865        0xda90cd67U, 0x8b000047U, true, true, "" },
     2866    { "ds_read_i8_d16_hi v139, v71 offset:52583\n",
     2867        0xda94cd67U, 0x8b000047U, true, true, "" },
     2868    { "ds_read_u16_d16 v139, v71 offset:52583\n",
     2869        0xda98cd67U, 0x8b000047U, true, true, "" },
     2870    { "ds_read_u16_d16_hi v139, v71 offset:52583\n",
     2871        0xda9ccd67U, 0x8b000047U, true, true, "" },
     2872    { "ds_write_addtid_b32 v71 offset:52583\n", 0xdac0cd67U, 0x00004700U, true, true, "" },
     2873    { "ds_read_addtid_b32 v139 offset:52583\n", 0xdac4cd67U, 0x8b000000U, true, true, "" },
    28322874    { nullptr, 0, 0, false, false, 0 }
    28332875};
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