Changeset 4860 in CLRX


Ignore:
Timestamp:
Jul 28, 2019, 1:33:26 PM (3 weeks ago)
Author:
matszpk
Message:

CLRadeonExtender: GCNAsm: Change parseVRegRangesLimited (remove arg 'required'). Fix checking number of VGPRs in VADDR in reglist.
First MIMG testcases with VADDR reglist.

Location:
CLRadeonExtender/trunk
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/amdasm/GCNAsmEncode2.cpp

    r4858 r4860  
    549549    else // for VADDR register list
    550550        good &= parseVRegRangesLimited(asmr, linePtr, 13, vaddrRegList,
    551                    GCNFIELD_M_VADDR_MULTI, true, INSTROP_SYMREGRANGE|INSTROP_READ);
     551                   GCNFIELD_M_VADDR_MULTI, INSTROP_SYMREGRANGE|INSTROP_READ);
    552552   
    553553    if (!isGCN15)
     
    758758        if (!vaddrReg)
    759759            for (const RegRange& rpair: vaddrRegList)
    760                 totalVaddrRegs = rpair.end - rpair.start;
     760                totalVaddrRegs += rpair.end - rpair.start;
    761761       
    762762        if (totalVaddrRegs < daddrsNum)
     
    819819    if (isGCN15 && !vaddrReg)
    820820    {
    821         output.insert(output.end(), vaddrRegCodes, vaddrRegCodes+totalVaddrRegs-1);
     821        output.insert(output.end(), vaddrRegCodes+1, vaddrRegCodes+totalVaddrRegs);
    822822        // alignment to dword
    823823        output.insert(output.end(), (4 - ((totalVaddrRegs-1)&3))&3, cxbyte(0));
  • CLRadeonExtender/trunk/amdasm/GCNAsmHelpers.cpp

    r4857 r4860  
    449449bool GCNAsmUtils::parseVRegRangesLimited(Assembler& asmr, const char*& linePtr,
    450450                   cxuint vgprsLimit, std::vector<RegRange>& regPairs,
    451                    AsmRegField regField, bool required, Flags flags)
     451                   AsmRegField regField, Flags flags)
    452452{
    453453    const char* oldLinePtr = linePtr;
     
    468468        const char *curRangePlace = linePtr;
    469469        regPairs.push_back({ 0, 0 });
    470         if (!parseVRegRange(asmr, linePtr, regPairs.back(), 0,
    471                             curRegField, required, flags))
     470        if (!parseVRegRange(asmr, linePtr, regPairs.back(), 0, curRegField, true, flags))
    472471            return false;
    473472        const RegRange& rpair = regPairs.back();
  • CLRadeonExtender/trunk/amdasm/GCNAsmInternals.h

    r4856 r4860  
    211211    static bool parseVRegRangesLimited(Assembler& asmr, const char*& linePtr,
    212212                   cxuint vgprsLimit, std::vector<RegRange>& regPairs,
    213                    AsmRegField regField, bool required = true,
    214                    Flags flags = INSTROP_SYMREGRANGE);
     213                   AsmRegField regField, Flags flags = INSTROP_SYMREGRANGE);
    215214    /* return true if no error */
    216215    static bool parseSRegRange(Assembler& asmr, const char*& linePtr, RegRange& regPair,
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc15.cpp

    r4859 r4860  
    32633263        "unorm glc slc\n", { 0xf2003b08U, 0x00159d79U }, 2, true,
    32643264        "test.s:1:66: Warning: Dim is already defined\n" },
     3265    /* MIMG dmasks */
     3266    { "image_load      v157, v[121:122], s[84:91] dim:2d unorm glc slc\n",
     3267        { 0xf2003108U, 0x00159d79U }, 2, true, "" },
     3268    { "image_load      v157, v[121:122], s[84:91] dmask:1 dim:2d unorm glc slc\n",
     3269        { 0xf2003108U, 0x00159d79U }, 2, true, "" },
     3270    { "image_load      v157, v[121:122], s[84:91] dmask:2 dim:2d unorm glc slc\n",
     3271        { 0xf2003208U, 0x00159d79U }, 2, true, "" },
     3272    { "image_load      v[157:158], v[121:122], s[84:91] dmask:3 dim:2d unorm glc slc\n",
     3273        { 0xf2003308U, 0x00159d79U }, 2, true, "" },
     3274    { "image_load      v157, v[121:122], s[84:91] dmask:4 dim:2d unorm glc slc\n",
     3275        { 0xf2003408U, 0x00159d79U }, 2, true, "" },
     3276    { "image_load      v[157:158], v[121:122], s[84:91] dmask:5 dim:2d unorm glc slc\n",
     3277        { 0xf2003508U, 0x00159d79U }, 2, true, "" },
     3278    { "image_load      v[157:158], v[121:122], s[84:91] dmask:6 dim:2d unorm glc slc\n",
     3279        { 0xf2003608U, 0x00159d79U }, 2, true, "" },
     3280    { "image_load      v[157:159], v[121:122], s[84:91] dmask:7 dim:2d unorm glc slc\n",
     3281        { 0xf2003708U, 0x00159d79U }, 2, true, "" },
     3282    { "image_load      v157, v[121:122], s[84:91] dmask:8 dim:2d unorm glc slc\n",
     3283        { 0xf2003808U, 0x00159d79U }, 2, true, "" },
     3284    { "image_load      v[157:158], v[121:122], s[84:91] dmask:9 dim:2d unorm glc slc\n",
     3285        { 0xf2003908U, 0x00159d79U }, 2, true, "" },
     3286    { "image_load      v[157:158], v[121:122], s[84:91] dmask:10 dim:2d unorm glc slc\n",
     3287        { 0xf2003a08U, 0x00159d79U }, 2, true, "" },
     3288    { "image_load      v[157:159], v[121:122], s[84:91] dmask:11 dim:2d unorm glc slc\n",
     3289        { 0xf2003b08U, 0x00159d79U }, 2, true, "" },
     3290    { "image_load      v[157:158], v[121:122], s[84:91] dmask:12 dim:2d unorm glc slc\n",
     3291        { 0xf2003c08U, 0x00159d79U }, 2, true, "" },
     3292    { "image_load      v[157:159], v[121:122], s[84:91] dmask:13 dim:2d unorm glc slc\n",
     3293        { 0xf2003d08U, 0x00159d79U }, 2, true, "" },
     3294    { "image_load      v[157:159], v[121:122], s[84:91] dmask:0xd dim:2d unorm glc slc\n",
     3295        { 0xf2003d08U, 0x00159d79U }, 2, true, "" },
     3296    { "image_load      v[157:159], v[121:122], s[84:91] dmask:14 dim:2d unorm glc slc\n",
     3297        { 0xf2003e08U, 0x00159d79U }, 2, true, "" },
     3298    { "image_load      v[157:160], v[121:122], s[84:91] dmask:15 dim:2d unorm glc slc\n",
     3299        { 0xf2003f08U, 0x00159d79U }, 2, true, "" },
     3300    { "piko=4; image_load      v157, v[121:122], s[84:91] dmask:piko dim:2d "
     3301        "unorm glc slc\n", { 0xf2003408U, 0x00159d79U }, 2, true, "" },
     3302    { "piko=4; image_load      v157, v[121:122], s[84:91] dmask  : piko dim:2d "
     3303        "unorm glc slc\n", { 0xf2003408U, 0x00159d79U }, 2, true, "" },
     3304    /* MIMG dmask D16 */
     3305    { "image_load      v157, v[121:122], s[84:91] dim:2d unorm glc d16 slc\n",
     3306        { 0xf2003108U, 0x80159d79U }, 2, true, "" },
     3307    { "image_load      v157, v[121:122], s[84:91] dmask:1 dim:2d unorm glc d16 slc\n",
     3308        { 0xf2003108U, 0x80159d79U }, 2, true, "" },
     3309    { "image_load      v157, v[121:122], s[84:91] dmask:2 dim:2d unorm glc d16 slc\n",
     3310        { 0xf2003208U, 0x80159d79U }, 2, true, "" },
     3311    { "image_load      v157, v[121:122], s[84:91] dmask:3 dim:2d unorm glc d16 slc\n",
     3312        { 0xf2003308U, 0x80159d79U }, 2, true, "" },
     3313    { "image_load      v157, v[121:122], s[84:91] dmask:4 dim:2d unorm glc d16 slc\n",
     3314        { 0xf2003408U, 0x80159d79U }, 2, true, "" },
     3315    { "image_load      v157, v[121:122], s[84:91] dmask:5 dim:2d unorm glc d16 slc\n",
     3316        { 0xf2003508U, 0x80159d79U }, 2, true, "" },
     3317    { "image_load      v157, v[121:122], s[84:91] dmask:6 dim:2d unorm glc d16 slc\n",
     3318        { 0xf2003608U, 0x80159d79U }, 2, true, "" },
     3319    { "image_load      v[157:158], v[121:122], s[84:91] dmask:7 dim:2d unorm glc d16 slc\n",
     3320        { 0xf2003708U, 0x80159d79U }, 2, true, "" },
     3321    { "image_load      v157, v[121:122], s[84:91] dmask:8 dim:2d unorm glc d16 slc\n",
     3322        { 0xf2003808U, 0x80159d79U }, 2, true, "" },
     3323    { "image_load      v157, v[121:122], s[84:91] dmask:9 dim:2d unorm glc d16 slc\n",
     3324        { 0xf2003908U, 0x80159d79U }, 2, true, "" },
     3325    { "image_load      v157, v[121:122], s[84:91] dmask:10 dim:2d unorm glc d16 slc\n",
     3326        { 0xf2003a08U, 0x80159d79U }, 2, true, "" },
     3327    { "image_load      v[157:158], v[121:122], s[84:91] dmask:11 dim:2d unorm "
     3328        "glc d16 slc\n", { 0xf2003b08U, 0x80159d79U }, 2, true, "" },
     3329    { "image_load      v157, v[121:122], s[84:91] dmask:12 dim:2d unorm glc d16 slc\n",
     3330        { 0xf2003c08U, 0x80159d79U }, 2, true, "" },
     3331    { "image_load      v[157:158], v[121:122], s[84:91] dmask:13 dim:2d unorm "
     3332        "glc d16 slc\n", { 0xf2003d08U, 0x80159d79U }, 2, true, "" },
     3333    { "image_load      v[157:158], v[121:122], s[84:91] dmask:14 dim:2d unorm "
     3334        "glc d16 slc\n", { 0xf2003e08U, 0x80159d79U }, 2, true, "" },
     3335    { "image_load      v[157:158], v[121:122], s[84:91] dmask:15 dim:2d unorm "
     3336        "glc d16 slc\n", { 0xf2003f08U, 0x80159d79U }, 2, true, "" },
     3337    { "image_load      v[157:158], [v121,v44,v75], s[84:91] dmask:15 dim:cube unorm "
     3338        "glc slc d16\n", { 0xf2003f1aU, 0x80159d79U, 0x00004b2cU }, 3, true, "" },
     3339    { "image_load      v[157:158], [v121,v[44:45]], s[84:91] dmask:15 dim:cube unorm "
     3340        "glc slc d16\n", { 0xf2003f1aU, 0x80159d79U, 0x00002d2cU }, 3, true, "" },
    32653341    { nullptr, { }, 0, false, 0 }
    32663342};
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