Changeset 4874 in CLRX


Ignore:
Timestamp:
Jul 28, 2019, 10:12:30 PM (3 weeks ago)
Author:
matszpk
Message:

CLRadeonExtender: GCNAsm: Add testcases for WAVE32. Add stuff to handle WAVE32 for GFX10.

Location:
CLRadeonExtender/trunk
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • CLRadeonExtender/trunk/amdasm/GCNAsmEncode1.cpp

    r4848 r4874  
    13281328    const bool isGCN12 = (arch & ARCH_GCN_1_2_4_5)!=0;
    13291329    const bool isGCN14 = (arch & ARCH_GCN_1_4_5)!=0;
     1330    const bool isGCN15 = (arch & ARCH_GCN_1_5)!=0;
     1331    const bool isWave32 = (asmr.getFlags() & ASM_WAVE32)!=0;
    13301332    GCNAssembler* gcnAsm = static_cast<GCNAssembler*>(asmr.isaAssembler);
    13311333   
     
    13521354    const bool haveDstCC = mode1 == GCN_DS2_VCC || mode1 == GCN_DST_VCC;
    13531355    const bool haveSrcCC = mode1 == GCN_DS2_VCC || mode1 == GCN_SRC2_VCC;
     1356   
     1357    const cxuint waveRegSize = (!isGCN15 || !isWave32 ||
     1358                        (gcnInsn.mode&GCN_VOP_NOWVSZ)!=0) ? 2 : 1;
    13541359    if (haveDstCC) /* VOP3b */
    13551360    {
     
    13581363        // parse SDST (in place VCC) (2 SGPR's)
    13591364        gcnAsm->setCurrentRVU(1);
    1360         good &= parseSRegRange(asmr, linePtr, dstCCReg, arch, 2, GCNFIELD_VOP3_SDST1, true,
    1361                                INSTROP_SYMREGRANGE|INSTROP_SGPR_UNALIGNED|INSTROP_WRITE);
     1365        good &= parseSRegRange(asmr, linePtr, dstCCReg, arch, waveRegSize,
     1366                    GCNFIELD_VOP3_SDST1, true, INSTROP_SYMREGRANGE|INSTROP_SGPR_UNALIGNED|
     1367                    INSTROP_WRITE);
    13621368    }
    13631369   
     
    14181424        gcnAsm->setCurrentRVU(4);
    14191425        // parse SSRC (VCC) (2 SGPR's)
    1420         good &= parseSRegRange(asmr, linePtr, srcCCReg, arch, 2, GCNFIELD_VOP3_SSRC, true,
    1421                        INSTROP_SYMREGRANGE|INSTROP_UNALIGNED|INSTROP_READ);
     1426        good &= parseSRegRange(asmr, linePtr, srcCCReg, arch, waveRegSize,
     1427                    GCNFIELD_VOP3_SSRC, true,INSTROP_SYMREGRANGE|INSTROP_UNALIGNED|
     1428                    INSTROP_READ);
    14221429    }
    14231430   
     
    17621769    const bool isGCN12 = (arch & ARCH_GCN_1_2_4_5)!=0;
    17631770    const bool isGCN14 = (arch & ARCH_GCN_1_4_5)!=0;
     1771    const bool isGCN15 = (arch & ARCH_GCN_1_5)!=0;
     1772    const bool isWave32 = (asmr.getFlags() & ASM_WAVE32)!=0;
    17641773   
    17651774    GCNAssembler* gcnAsm = static_cast<GCNAssembler*>(asmr.isaAssembler);
     
    17751784    {
    17761785        gcnAsm->setCurrentRVU(0);
    1777         good &= parseSRegRange(asmr, linePtr, dstReg, arch, 2, GCNFIELD_VOP3_SDST0, true,
    1778                             INSTROP_SYMREGRANGE|INSTROP_SGPR_UNALIGNED|INSTROP_WRITE);
     1786        const cxuint regSize = (!isGCN15 || !isWave32 ||
     1787                        (gcnInsn.mode&GCN_VOP_NOWVSZ)!=0) ? 2 : 1;
     1788        good &= parseSRegRange(asmr, linePtr, dstReg, arch, regSize, GCNFIELD_VOP3_SDST0,
     1789                        true, INSTROP_SYMREGRANGE|INSTROP_SGPR_UNALIGNED|INSTROP_WRITE);
    17791790        if (!skipRequiredComma(asmr, linePtr))
    17801791            return false;
     
    19501961    const bool isGCN14 = (arch & ARCH_GCN_1_4_5)!=0;
    19511962    const bool isGCN15 = (arch & ARCH_GCN_1_5)!=0;
     1963    const bool isWave32 = (asmr.getFlags() & ASM_WAVE32)!=0;
    19521964    const bool vop3p = (gcnInsn.mode & GCN_VOP3_VOP3P) != 0 ||
    19531965                    (gcnInsn.encoding == GCNENC_VOP3P);
     
    20022014            // SDST (VCC) (2 SGPR's)
    20032015            gcnAsm->setCurrentRVU(1);
    2004             good &= parseSRegRange(asmr, linePtr, sdstReg, arch, 2, GCNFIELD_VOP3_SDST1,
    2005                        true, INSTROP_SYMREGRANGE|INSTROP_WRITE|INSTROP_SGPR_UNALIGNED);
     2016            const cxuint regSize = (!isGCN15 || !isWave32 ||
     2017                        (gcnInsn.mode&GCN_VOP_NOWVSZ)!=0) ? 2 : 1;
     2018            good &= parseSRegRange(asmr, linePtr, sdstReg, arch, regSize,
     2019                        GCNFIELD_VOP3_SDST1, true, INSTROP_SYMREGRANGE|INSTROP_WRITE|
     2020                        INSTROP_SGPR_UNALIGNED);
    20062021            if (!skipRequiredComma(asmr, linePtr))
    20072022                return false;
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc.h

    r4873 r4874  
    5050extern const GCNAsmOpcodeCase2 encGCN15OpcodeCases2[];
    5151extern const GCNAsmOpcodeCase encGCN151OpcodeCases[];
     52extern const GCNAsmOpcodeCase encGCN15W32OpcodeCases[];
    5253
    5354#endif
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpc15.cpp

    r4873 r4874  
    40794079    { nullptr, 0, 0, false, false, 0 }
    40804080};
     4081
     4082/* for Radeon NAVI series with GCN1.5 with wavefront size 32 */
     4083const GCNAsmOpcodeCase encGCN15W32OpcodeCases[] =
     4084{
     4085    // VOP2
     4086    { "v_cndmask_b32   v154, v21, v107, vcc_lo\n", 0x0334d715U, 0, false, true, "" },
     4087    { "v_add_co_ci_u32 v154, vcc_lo, v21, v107, vcc_lo\n",
     4088        0x5134d715U, 0, false, true, "" },
     4089    { "v_sub_co_ci_u32 v154, vcc_lo, v21, v107, vcc_lo\n",
     4090        0x5334d715U, 0, false, true, "" },
     4091    { "v_subrev_co_ci_u32 v154, vcc_lo, v21, v107, vcc_lo\n",
     4092        0x5534d715U, 0, false, true, "" },
     4093    // VOPC
     4094    { "v_cmp_f_f32     vcc_lo, v79, v201\n", 0x7c01934fU, 0, false, true, "" },
     4095    // VOP3/VOP2
     4096    { "v_cndmask_b32   v42, v50, v107, s15\n", 0xd501002aU, 0x003ed732U, true, true, "" },
     4097    { "v_add_co_ci_u32 v55, s7, s27, -v90, s25\n",
     4098        0xd5280737U, 0x4066b41bU, true, true, "" },
     4099    { "v_add_co_ci_u32 v55, vcc_lo, s27, v90, vcc_lo vop3\n",
     4100        0xd5286a37U, 0x01aab41bU, true, true, "" },
     4101    { "v_add_co_ci_u32 v55, vcc_lo, s27, -v90, vcc_lo\n",
     4102        0xd5286a37U, 0x41aab41bU, true, true, "" },
     4103    { "v_sub_co_ci_u32 v55, s7, s27, -v90, s25\n",
     4104        0xd5290737U, 0x4066b41bU, true, true, "" },
     4105    { "v_subrev_co_ci_u32 v55, s7, s27, -v90, s25\n",
     4106        0xd52a0737U, 0x4066b41bU, true, true, "" },
     4107    // VOP3/VOPC
     4108    { "v_cmp_lt_f32    s42, v50, v107\n", 0xd401002aU, 0x0002d732U, true, true, "" },
     4109    // VOP3b/VOP3
     4110    { "v_div_scale_f32 v55, s37, v79, v166, v229\n",
     4111        0xd56d2537U, 0x07974d4fU, true, true, "" },
     4112    { "v_div_scale_f32 v55, vcc_lo, v79, v166, s0\n",
     4113        0xd56d6a37U, 0x00034d4fU, true, true, "" },
     4114    { "v_div_scale_f64 v[55:56], s37, v[79:80], v[166:167], v[229:230]\n",
     4115        0xd56e2537U, 0x07974d4fU, true, true, "" },
     4116    { "v_mad_u64_u32   v[55:56], s47, v79, v166, v[229:230]\n",
     4117        0xd5762f37U, 0x07974d4fU, true, true, "" },
     4118    { "v_mad_i64_i32   v[55:56], s47, v79, v166, v[229:230]\n",
     4119        0xd5772f37U, 0x07974d4fU, true, true, "" },
     4120    { "v_add_co_u32    v55, s26, v79, v166\n", 0xd70f1a37U, 0x00034d4fU, true, true, "" },
     4121    { "v_sub_co_u32    v55, s26, v79, v166\n", 0xd7101a37U, 0x00034d4fU, true, true, "" },
     4122    { "v_subrev_co_u32 v55, s26, v79, v166\n", 0xd7191a37U, 0x00034d4fU, true, true, "" },
     4123    // no apply
     4124    { "v_readlane_b32  s55, v79, v166\n", 0xd7600037U, 0x00034d4fU, true, true, "" },
     4125    { "v_writelane_b32 v55, v79, v166\n", 0xd7610037U, 0x00034d4fU, true, true, "" },
     4126    { "v_writelane_b32 v55, s79, v166\n", 0xd7610037U, 0x00034c4fU, true, true, "" },
     4127    { nullptr, 0, 0, false, false, 0 }
     4128};
  • CLRadeonExtender/trunk/tests/amdasm/GCNAsmOpcodes.cpp

    r4873 r4874  
    2929
    3030static void testEncGCNOpcodes(cxuint i, const GCNAsmOpcodeCase& testCase,
    31                       GPUDeviceType deviceType)
     31                      GPUDeviceType deviceType, Flags flags)
    3232{
    3333    std::istringstream input(testCase.input);
     
    3535   
    3636    // create assembler with input stream (content is string
    37     Assembler assembler("test.s", input, ASM_ALL&~ASM_ALTMACRO,
     37    Assembler assembler("test.s", input, flags|(ASM_ALL&~(ASM_ALTMACRO|ASM_WAVE32)),
    3838                    BinaryFormat::GALLIUM, deviceType, errorStream);
    3939    // try to assemble code
    4040    bool good = assembler.assemble();
    4141    std::ostringstream oss;
    42     oss << getGPUDeviceTypeName(deviceType) << " encGCNCase#" << i;
     42    oss << getGPUDeviceTypeName(deviceType) << ", flags=" << flags << " encGCNCase#" << i;
    4343    const std::string testCaseName = oss.str();
    4444    // check is good match in testcase
     
    4747    {
    4848        std::ostringstream oss;
    49         oss << "FAILED for " << getGPUDeviceTypeName(deviceType) <<
     49        oss << "FAILED for " << getGPUDeviceTypeName(deviceType) << ", flags=" << flags <<
    5050            " encGCNCase#" << i;
    5151        throw Exception(oss.str());
     
    5858    {
    5959        std::ostringstream oss;
    60         oss << "FAILED for " << getGPUDeviceTypeName(deviceType) <<
     60        oss << "FAILED for " << getGPUDeviceTypeName(deviceType) << ", flags=" << flags <<
    6161            " encGCNCase#" << i << ". Wrong code size: " << expectedSize << "!=" <<
    6262            codeSize;
     
    8181            std::ostringstream oss;
    8282            oss << "FAILED for " << getGPUDeviceTypeName(deviceType) <<
    83                 " encGCNCase#" << i << ". Content doesn't match: 0x" <<
     83                 ", flags=" << flags << " encGCNCase#" << i <<
     84                 ". Content doesn't match: 0x" <<
    8485                std::hex << expectedWord0 << "!=0x" << resultWord0 << std::dec;
    8586            if (expectedSize==8)
     
    9596
    9697static void testEncGCNOpcodes2(cxuint i, const GCNAsmOpcodeCase2& testCase,
    97                       GPUDeviceType deviceType)
     98                      GPUDeviceType deviceType, Flags flags)
    9899{
    99100    std::istringstream input(testCase.input);
     
    101102   
    102103    // create assembler with input stream (content is string
    103     Assembler assembler("test.s", input, ASM_ALL&~ASM_ALTMACRO,
     104    Assembler assembler("test.s", input, flags|(ASM_ALL&~(ASM_ALTMACRO|ASM_WAVE32)),
    104105                    BinaryFormat::GALLIUM, deviceType, errorStream);
    105106    // try to assemble code
    106107    bool good = assembler.assemble();
    107108    std::ostringstream oss;
    108     oss << getGPUDeviceTypeName(deviceType) << " encGCNCase#" << i;
     109    oss << getGPUDeviceTypeName(deviceType) << ", flags=" << flags << " encGCNCase#" << i;
    109110    const std::string testCaseName = oss.str();
    110111    // check is good match in testcase
     
    113114    {
    114115        std::ostringstream oss;
    115         oss << "FAILED for " << getGPUDeviceTypeName(deviceType) <<
     116        oss << "FAILED for " << getGPUDeviceTypeName(deviceType) << ", flags=" << flags <<
    116117            " encGCNCase#" << i;
    117118        throw Exception(oss.str());
     
    124125    {
    125126        std::ostringstream oss;
    126         oss << "FAILED for " << getGPUDeviceTypeName(deviceType) <<
     127        oss << "FAILED for " << getGPUDeviceTypeName(deviceType) << ", flags=" << flags <<
    127128            " encGCNCase#" << i << ". Wrong code size: " << expectedSize << "!=" <<
    128129            codeSize;
     
    149150            std::ostringstream oss;
    150151            oss << "FAILED for " << getGPUDeviceTypeName(deviceType) <<
    151                 " encGCNCase#" << i << ". Content doesn't match";
     152                ", flags=" << flags << " encGCNCase#" << i << ". Content doesn't match";
    152153            for (cxuint i = 0; i < testCase.expWordsNum; i++)
    153154            {
     
    171172    for (cxuint i = 0; encGCNOpcodeCases[i].input!=nullptr; i++)
    172173        try
    173         { testEncGCNOpcodes(i, encGCNOpcodeCases[i], GPUDeviceType::PITCAIRN); }
     174        { testEncGCNOpcodes(i, encGCNOpcodeCases[i], GPUDeviceType::PITCAIRN, 0); }
    174175        catch(const std::exception& ex)
    175176        {
     
    179180    for (cxuint i = 0; encGCN11OpcodeCases[i].input!=nullptr; i++)
    180181        try
    181         { testEncGCNOpcodes(i, encGCN11OpcodeCases[i], GPUDeviceType::BONAIRE); }
     182        { testEncGCNOpcodes(i, encGCN11OpcodeCases[i], GPUDeviceType::BONAIRE, 0); }
    182183        catch(const std::exception& ex)
    183184        {
     
    187188    for (cxuint i = 0; encGCN12OpcodeCases[i].input!=nullptr; i++)
    188189        try
    189         { testEncGCNOpcodes(i, encGCN12OpcodeCases[i], GPUDeviceType::TONGA); }
     190        { testEncGCNOpcodes(i, encGCN12OpcodeCases[i], GPUDeviceType::TONGA, 0); }
    190191        catch(const std::exception& ex)
    191192        {
     
    195196    for (cxuint i = 0; encGCN14OpcodeCases[i].input!=nullptr; i++)
    196197        try
    197         { testEncGCNOpcodes(i, encGCN14OpcodeCases[i], GPUDeviceType::GFX900); }
     198        { testEncGCNOpcodes(i, encGCN14OpcodeCases[i], GPUDeviceType::GFX900, 0); }
    198199        catch(const std::exception& ex)
    199200        {
     
    203204    for (cxuint i = 0; encGCN141OpcodeCases[i].input!=nullptr; i++)
    204205        try
    205         { testEncGCNOpcodes(i, encGCN141OpcodeCases[i], GPUDeviceType::GFX906); }
     206        { testEncGCNOpcodes(i, encGCN141OpcodeCases[i], GPUDeviceType::GFX906, 0); }
    206207        catch(const std::exception& ex)
    207208        {
     
    211212    for (cxuint i = 0; encGCN15OpcodeCases[i].input!=nullptr; i++)
    212213        try
    213         { testEncGCNOpcodes(i, encGCN15OpcodeCases[i], GPUDeviceType::GFX1010); }
     214        { testEncGCNOpcodes(i, encGCN15OpcodeCases[i], GPUDeviceType::GFX1010, 0); }
    214215        catch(const std::exception& ex)
    215216        {
     
    219220    for (cxuint i = 0; encGCN15OpcodeCases2[i].input!=nullptr; i++)
    220221        try
    221         { testEncGCNOpcodes2(i, encGCN15OpcodeCases2[i], GPUDeviceType::GFX1010); }
     222        { testEncGCNOpcodes2(i, encGCN15OpcodeCases2[i], GPUDeviceType::GFX1010, 0); }
    222223        catch(const std::exception& ex)
    223224        {
     
    227228    for (cxuint i = 0; encGCN151OpcodeCases[i].input!=nullptr; i++)
    228229        try
    229         { testEncGCNOpcodes(i, encGCN151OpcodeCases[i], GPUDeviceType::GFX1011); }
     230        { testEncGCNOpcodes(i, encGCN151OpcodeCases[i], GPUDeviceType::GFX1011, 0); }
     231        catch(const std::exception& ex)
     232        {
     233            std::cerr << ex.what() << std::endl;
     234            retVal = 1;
     235        }
     236    for (cxuint i = 0; encGCN15W32OpcodeCases[i].input!=nullptr; i++)
     237        try
     238        { testEncGCNOpcodes(i, encGCN15W32OpcodeCases[i], GPUDeviceType::GFX1010,
     239                                ASM_WAVE32); }
    230240        catch(const std::exception& ex)
    231241        {
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