Timeline


and

Sep 27, 2019:

6:00 AM GcnInstrsVop3 edited by trac
(diff)
5:45 AM Changeset in CLRX [4995] by matszpk

CLRadeonExtender: Docs: Fix typo in V_DIV_FMAS_F32 and V_DIV_FMAS_F64.

Sep 26, 2019:

11:28 AM Changeset in CLRX [4994] by matszpk

CLRadeonExtender: Add new pseudo-ops to editor's syntaxes.

Sep 24, 2019:

2:41 PM Changeset in CLRX [4993] by matszpk

CLRadeonExtender: GCNAsm: Allow shortened form of FLAT/GLOBAL atomics with 2 operands (addr and data).

Sep 23, 2019:

5:01 PM ClrxAsmPseudoOps edited by trac
(diff)
5:01 PM ClrxAsmRocm edited by trac
(diff)
4:15 PM Changeset in CLRX [4992] by matszpk

CLRadeonExtender: CLRXDocs: Update docs - add description for new pseudo-ops.

3:09 PM Changeset in CLRX [4991] by matszpk

CLRadeonExtender: AsmROCm: Correct handling '.wave32' and '.nowave32' in ROCm format handling (setting codeFlags and enableSgprsFeatures).

2:27 PM Changeset in CLRX [4990] by matszpk

CLRadeonExtender: KCode: Next ROCm wave32 testcase. Enable rest of AsmRegPool? testcases.

11:39 AM Changeset in CLRX [4989] by matszpk

CLRadeonExtender: KCode: Correct handling switching and checking codeFlags between kcode regions.

9:03 AM Changeset in CLRX [4988] by matszpk

CLRadeonExtender: GPUId: Count VCC as 1 extra SGPR register if Navi and WAVE32.

8:46 AM Changeset in CLRX [4987] by matszpk

CLRadeonExtender: AsmROCm: First testcase for CodeFlags? testing.

Sep 21, 2019:

11:22 AM Changeset in CLRX [4986] by matszpk

CLRadeonExtender: ROCm: Fixed alignment for rodata section (LLVM10 bin format).

Sep 20, 2019:

4:17 PM Changeset in CLRX [4985] by matszpk

CLRadeonExtender: AsmROCm: Initialize required fields in metadata from kernel config and calculate kernarg size for MetadataV3 format.

Sep 19, 2019:

7:16 PM Changeset in CLRX [4984] by matszpk

CLRadeonExtender: ROCmGen: Fixed stupid segfaults.

7:13 PM Changeset in CLRX [4983] by matszpk

CLRadeonExtender: ROCmGen: Set up kernel code offset in kernel descriptor. Remove obsolete stuff from AsmROCmFormat.

5:30 PM Changeset in CLRX [4982] by matszpk

CLRadeonExtender: ROCmGen: Add kernel descriptor for kernel symbols (LLVM10BinFmt).

4:42 PM Changeset in CLRX [4981] by matszpk

CLRadeonExtender: ROCmGen: Ordering binary sections (LLVM10BinFormat). Some changes.

4:28 PM Changeset in CLRX [4980] by matszpk

CLRadeonExtender: ROCmGen: (for LLVM10BinFormat) Do not add other notes to binary. Add MsgPack? metadata note.

4:05 PM Changeset in CLRX [4979] by matszpk

CLRadeonExtender: ROCmGen: Add a missing kernel descriptor symbols.

3:45 PM Changeset in CLRX [4978] by matszpk

CLRadeonExtender: ROCm: Fixed compiler warning. fixed segfault when kernel descriptor offset is out of range.

3:28 PM Changeset in CLRX [4977] by matszpk

CLRadeonExtender: ROCm: Some fixes.

3:16 PM Changeset in CLRX [4976] by matszpk

CLRadeonExtender: AsmROCm: Add some missing pseudo-ops to ROCm format handling.

2:19 PM Changeset in CLRX [4975] by matszpk

CLRadeonExtender: AsmROCm: Fixed checking shared VGPRs number while setting PGMRSRC3.

2:16 PM Changeset in CLRX [4974] by matszpk

CLRadeonExtender: AsmROCm: Fixed calculation of kernel argument offset.

1:13 PM Changeset in CLRX [4973] by matszpk

CLRadeonExtender: AsmROCm: Add calculatePgmRsrc3 and setup PGMRSRC3. Check shared vgprs number before setting.

11:10 AM Changeset in CLRX [4972] by matszpk

CLRadeonExtender: Asm: Add '.amd3' pseudo-op for new OpenCL binary format for Navi (ROCm LLVM10BinFormat).

9:06 AM Changeset in CLRX [4971] by matszpk

CLRadeonExtender: AsmROCm: Store SGPRs number in PGMRSRC1 (weird??). Treat argAlign in metadata v3 format as arg offset. Use llvm10BinFormat from output.

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