Changes between Version 7 and Version 8 of ClrxAsmSyntax

Timestamp:

11/10/15 21:00:18 (8 years ago)

Author:

trac

Comment:

--

ClrxAsmSyntax

@@ -45 +45 @@
 s_and_b64 reg1, s[2:3], s[4:5]  # output as s[0:1]
 s_cmp_lt_i32 reg1[0], s2        # compare s0 with s2
-v_xor_b32 regpool[4], regpool[7], regpool[9]    # v_xor_b32 v20, v23, v25</code></p>
+v_xor_b32 regpool[4], regpool[7], regpool[9]    # v_xor_b32 v20, v23, v25
+zx = 10 # zx symbol
+v_xor_b32 regpool[zx+1], regpool[zx+5], regpool[zx+7]    # v_xor_b32 v27, v31, v33</code></p>
 <h3>Sections</h3>
 <p>Section is some part of the binary that contains some data. Type of the data depends on
@@ -356 +358 @@
 on the sections during evaluating an expression. Division, modulo,
 binary operations (except negation), logical operations is not legal.</p>
+<h3>Instruction operands</h3>
+<p>Instruction operand can be one of list:</p>
+<ul>
+<li>GCN register or register range</li>
+<li>absolute expression</li>
+<li>float literal</li>
+<li>in VOP3 encoding operand modifier: abs, neg</li>
+</ul>
+<p>An expression can be preceded by '@' to ensure that a following text will be treated as
+an expression:</p>
+<p><code>v_add_f32 v0, @v0, v4       # second operand is expression: 'v0' instead of v0 register</code></p>
+<p>Alternatively, any expression can be inscribed in parentheses to ensure that result.</p>
 }}}