Changes between Version 26 and Version 27 of GcnInstrsDs
- Timestamp:
- 11/28/17 15:00:30 (6 years ago)
Legend:
- Unmodified
- Added
- Removed
- Modified
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GcnInstrsDs
v26 v27 82 82 <p>Any DS instruction return data in order (including DS_SWIZZLE_B32) and increments LGKM_CNT. 83 83 Any operation increments LGKM by one, and decremented by one if it will be finished.</p> 84 <p>List of the instructions by opcode :</p>84 <p>List of the instructions by opcode (GCN 1.0/1.1):</p> 85 85 <table> 86 86 <thead> … … 89 89 <th>GCN 1.0</th> 90 90 <th>GCN 1.1</th> 91 <th>Mnemonic (GCN 1.0/1.1)</th> 92 <th>Mnemonic (GCN 1.2/1.4)</th> 91 <th>Mnemonic</th> 93 92 </tr> 94 93 </thead> … … 99 98 <td>✓</td> 100 99 <td>DS_ADD_U32</td> 101 <td>DS_ADD_U32</td>102 100 </tr> 103 101 <tr> … … 106 104 <td>✓</td> 107 105 <td>DS_SUB_U32</td> 108 <td>DS_SUB_U32</td>109 106 </tr> 110 107 <tr> … … 113 110 <td>✓</td> 114 111 <td>DS_RSUB_U32</td> 115 <td>DS_RSUB_U32</td>116 112 </tr> 117 113 <tr> … … 120 116 <td>✓</td> 121 117 <td>DS_INC_U32</td> 122 <td>DS_INC_U32</td>123 118 </tr> 124 119 <tr> … … 127 122 <td>✓</td> 128 123 <td>DS_DEC_U32</td> 129 <td>DS_DEC_U32</td>130 124 </tr> 131 125 <tr> … … 134 128 <td>✓</td> 135 129 <td>DS_MIN_I32</td> 136 <td>DS_MIN_I32</td>137 130 </tr> 138 131 <tr> … … 141 134 <td>✓</td> 142 135 <td>DS_MAX_I32</td> 143 <td>DS_MAX_I32</td>144 136 </tr> 145 137 <tr> … … 148 140 <td>✓</td> 149 141 <td>DS_MIN_U32</td> 150 <td>DS_MIN_U32</td>151 142 </tr> 152 143 <tr> … … 155 146 <td>✓</td> 156 147 <td>DS_MAX_U32</td> 157 <td>DS_MAX_U32</td>158 148 </tr> 159 149 <tr> … … 162 152 <td>✓</td> 163 153 <td>DS_AND_B32</td> 164 <td>DS_AND_B32</td>165 154 </tr> 166 155 <tr> … … 169 158 <td>✓</td> 170 159 <td>DS_OR_B32</td> 171 <td>DS_OR_B32</td>172 160 </tr> 173 161 <tr> … … 176 164 <td>✓</td> 177 165 <td>DS_XOR_B32</td> 178 <td>DS_XOR_B32</td>179 166 </tr> 180 167 <tr> … … 183 170 <td>✓</td> 184 171 <td>DS_MSKOR_B32</td> 185 <td>DS_MSKOR_B32</td>186 172 </tr> 187 173 <tr> … … 190 176 <td>✓</td> 191 177 <td>DS_WRITE_B32</td> 192 <td>DS_WRITE_B32</td>193 178 </tr> 194 179 <tr> … … 197 182 <td>✓</td> 198 183 <td>DS_WRITE2_B32</td> 199 <td>DS_WRITE2_B32</td>200 184 </tr> 201 185 <tr> … … 204 188 <td>✓</td> 205 189 <td>DS_WRITE2ST64_B32</td> 206 <td>DS_WRITE2ST64_B32</td>207 190 </tr> 208 191 <tr> … … 211 194 <td>✓</td> 212 195 <td>DS_CMPST_B32</td> 213 <td>DS_CMPST_B32</td>214 196 </tr> 215 197 <tr> … … 218 200 <td>✓</td> 219 201 <td>DS_CMPST_F32</td> 220 <td>DS_CMPST_F32</td>221 202 </tr> 222 203 <tr> … … 225 206 <td>✓</td> 226 207 <td>DS_MIN_F32</td> 227 <td>DS_MIN_F32</td>228 208 </tr> 229 209 <tr> … … 231 211 <td>✓</td> 232 212 <td>✓</td> 233 <td>DS_MAX_F32</td>234 213 <td>DS_MAX_F32</td> 235 214 </tr> … … 239 218 <td>✓</td> 240 219 <td>DS_NOP</td> 241 <td>DS_NOP</td>242 </tr>243 <tr>244 <td>21 (0x15)</td>245 <td></td>246 <td></td>247 <td>--</td>248 <td>DS_ADD_F32</td>249 220 </tr> 250 221 <tr> … … 253 224 <td>✓</td> 254 225 <td>DS_GWS_SEMA_RELEASE_ALL</td> 255 <td>--</td>256 226 </tr> 257 227 <tr> … … 260 230 <td>✓</td> 261 231 <td>DS_GWS_INIT</td> 262 <td>--</td>263 232 </tr> 264 233 <tr> … … 267 236 <td>✓</td> 268 237 <td>DS_GWS_SEMA_V</td> 269 <td>--</td>270 238 </tr> 271 239 <tr> … … 274 242 <td>✓</td> 275 243 <td>DS_GWS_SEMA_BR</td> 276 <td>--</td>277 244 </tr> 278 245 <tr> … … 281 248 <td>✓</td> 282 249 <td>DS_GWS_SEMA_P</td> 283 <td>--</td>284 250 </tr> 285 251 <tr> … … 288 254 <td>✓</td> 289 255 <td>DS_GWS_BARRIER</td> 290 <td>--</td>291 256 </tr> 292 257 <tr> … … 295 260 <td>✓</td> 296 261 <td>DS_WRITE_B8</td> 297 <td>DS_WRITE_B8</td>298 262 </tr> 299 263 <tr> … … 302 266 <td>✓</td> 303 267 <td>DS_WRITE_B16</td> 304 <td>DS_WRITE_B16</td>305 268 </tr> 306 269 <tr> … … 309 272 <td>✓</td> 310 273 <td>DS_ADD_RTN_U32</td> 311 <td>DS_ADD_RTN_U32</td>312 274 </tr> 313 275 <tr> … … 316 278 <td>✓</td> 317 279 <td>DS_SUB_RTN_U32</td> 318 <td>DS_SUB_RTN_U32</td>319 280 </tr> 320 281 <tr> … … 323 284 <td>✓</td> 324 285 <td>DS_RSUB_RTN_U32</td> 325 <td>DS_RSUB_RTN_U32</td>326 286 </tr> 327 287 <tr> … … 330 290 <td>✓</td> 331 291 <td>DS_INC_RTN_U32</td> 332 <td>DS_INC_RTN_U32</td>333 292 </tr> 334 293 <tr> … … 337 296 <td>✓</td> 338 297 <td>DS_DEC_RTN_U32</td> 339 <td>DS_DEC_RTN_U32</td>340 298 </tr> 341 299 <tr> … … 344 302 <td>✓</td> 345 303 <td>DS_MIN_RTN_I32</td> 346 <td>DS_MIN_RTN_I32</td>347 304 </tr> 348 305 <tr> … … 351 308 <td>✓</td> 352 309 <td>DS_MAX_RTN_I32</td> 353 <td>DS_MAX_RTN_I32</td>354 310 </tr> 355 311 <tr> … … 358 314 <td>✓</td> 359 315 <td>DS_MIN_RTN_U32</td> 360 <td>DS_MIN_RTN_U32</td>361 316 </tr> 362 317 <tr> … … 365 320 <td>✓</td> 366 321 <td>DS_MAX_RTN_U32</td> 367 <td>DS_MAX_RTN_U32</td>368 322 </tr> 369 323 <tr> … … 372 326 <td>✓</td> 373 327 <td>DS_AND_RTN_B32</td> 374 <td>DS_AND_RTN_B32</td>375 328 </tr> 376 329 <tr> … … 379 332 <td>✓</td> 380 333 <td>DS_OR_RTN_B32</td> 381 <td>DS_OR_RTN_B32</td>382 334 </tr> 383 335 <tr> … … 386 338 <td>✓</td> 387 339 <td>DS_XOR_RTN_B32</td> 388 <td>DS_XOR_RTN_B32</td>389 340 </tr> 390 341 <tr> … … 393 344 <td>✓</td> 394 345 <td>DS_MSKOR_RTN_B32</td> 395 <td>DS_MSKOR_RTN_B32</td>396 346 </tr> 397 347 <tr> … … 400 350 <td>✓</td> 401 351 <td>DS_WRXCHG_RTN_B32</td> 402 <td>DS_WRXCHG_RTN_B32</td>403 352 </tr> 404 353 <tr> … … 407 356 <td>✓</td> 408 357 <td>DS_WRXCHG2_RTN_B32</td> 409 <td>DS_WRXCHG2_RTN_B32</td>410 358 </tr> 411 359 <tr> … … 414 362 <td>✓</td> 415 363 <td>DS_WRXCHG2ST64_RTN_B32</td> 416 <td>DS_WRXCHG2ST64_RTN_B32</td>417 364 </tr> 418 365 <tr> … … 421 368 <td>✓</td> 422 369 <td>DS_CMPST_RTN_B32</td> 423 <td>DS_CMPST_RTN_B32</td>424 370 </tr> 425 371 <tr> … … 428 374 <td>✓</td> 429 375 <td>DS_CMPST_RTN_F32</td> 430 <td>DS_CMPST_RTN_F32</td>431 376 </tr> 432 377 <tr> … … 435 380 <td>✓</td> 436 381 <td>DS_MIN_RTN_F32</td> 437 <td>DS_MIN_RTN_F32</td>438 382 </tr> 439 383 <tr> … … 441 385 <td>✓</td> 442 386 <td>✓</td> 443 <td>DS_MAX_RTN_F32</td>444 387 <td>DS_MAX_RTN_F32</td> 445 388 </tr> … … 449 392 <td>✓</td> 450 393 <td>DS_WRAP_RTN_B32</td> 451 <td>DS_WRAP_RTN_B32</td>452 394 </tr> 453 395 <tr> … … 456 398 <td>✓</td> 457 399 <td>DS_SWIZZLE_B32</td> 458 <td>DS_ADD_RTN_F32</td>459 400 </tr> 460 401 <tr> … … 463 404 <td>✓</td> 464 405 <td>DS_READ_B32</td> 465 <td>DS_READ_B32</td>466 406 </tr> 467 407 <tr> … … 470 410 <td>✓</td> 471 411 <td>DS_READ2_B32</td> 472 <td>DS_READ2_B32</td>473 412 </tr> 474 413 <tr> … … 477 416 <td>✓</td> 478 417 <td>DS_READ2ST64_B32</td> 479 <td>DS_READ2ST64_B32</td>480 418 </tr> 481 419 <tr> … … 484 422 <td>✓</td> 485 423 <td>DS_READ_I8</td> 486 <td>DS_READ_I8</td>487 424 </tr> 488 425 <tr> … … 491 428 <td>✓</td> 492 429 <td>DS_READ_U8</td> 493 <td>DS_READ_U8</td>494 430 </tr> 495 431 <tr> … … 498 434 <td>✓</td> 499 435 <td>DS_READ_I16</td> 500 <td>DS_READ_I16</td>501 436 </tr> 502 437 <tr> … … 505 440 <td>✓</td> 506 441 <td>DS_READ_U16</td> 507 <td>DS_READ_U16</td>508 442 </tr> 509 443 <tr> … … 512 446 <td>✓</td> 513 447 <td>DS_CONSUME</td> 514 <td>DS_SWIZZLE_B32</td>515 448 </tr> 516 449 <tr> … … 519 452 <td>✓</td> 520 453 <td>DS_APPEND</td> 521 <td>DS_PERMUTE_B32</td>522 454 </tr> 523 455 <tr> … … 526 458 <td>✓</td> 527 459 <td>DS_ORDERED_COUNT (???)</td> 528 <td>DS_BPERMUTE_B32</td>529 460 </tr> 530 461 <tr> … … 533 464 <td>✓</td> 534 465 <td>DS_ADD_U64</td> 535 <td>DS_ADD_U64</td>536 466 </tr> 537 467 <tr> … … 540 470 <td>✓</td> 541 471 <td>DS_SUB_U64</td> 542 <td>DS_SUB_U64</td>543 472 </tr> 544 473 <tr> … … 547 476 <td>✓</td> 548 477 <td>DS_RSUB_U64</td> 549 <td>DS_RSUB_U64</td>550 478 </tr> 551 479 <tr> … … 554 482 <td>✓</td> 555 483 <td>DS_INC_U64</td> 556 <td>DS_INC_U64</td>557 484 </tr> 558 485 <tr> … … 561 488 <td>✓</td> 562 489 <td>DS_DEC_U64</td> 563 <td>DS_DEC_U64</td>564 490 </tr> 565 491 <tr> … … 568 494 <td>✓</td> 569 495 <td>DS_MIN_I64</td> 570 <td>DS_MIN_I64</td>571 496 </tr> 572 497 <tr> … … 575 500 <td>✓</td> 576 501 <td>DS_MAX_I64</td> 577 <td>DS_MAX_I64</td>578 502 </tr> 579 503 <tr> … … 582 506 <td>✓</td> 583 507 <td>DS_MIN_U64</td> 584 <td>DS_MIN_U64</td>585 508 </tr> 586 509 <tr> … … 589 512 <td>✓</td> 590 513 <td>DS_MAX_U64</td> 591 <td>DS_MAX_U64</td>592 514 </tr> 593 515 <tr> … … 596 518 <td>✓</td> 597 519 <td>DS_AND_B64</td> 598 <td>DS_AND_B64</td>599 520 </tr> 600 521 <tr> … … 603 524 <td>✓</td> 604 525 <td>DS_OR_B64</td> 605 <td>DS_OR_B64</td>606 526 </tr> 607 527 <tr> … … 610 530 <td>✓</td> 611 531 <td>DS_XOR_B64</td> 612 <td>DS_XOR_B64</td>613 532 </tr> 614 533 <tr> … … 617 536 <td>✓</td> 618 537 <td>DS_MSKOR_B64</td> 619 <td>DS_MSKOR_B64</td>620 538 </tr> 621 539 <tr> … … 624 542 <td>✓</td> 625 543 <td>DS_WRITE_B64</td> 626 <td>DS_WRITE_B64</td>627 544 </tr> 628 545 <tr> … … 631 548 <td>✓</td> 632 549 <td>DS_WRITE2_B64</td> 633 <td>DS_WRITE2_B64</td>634 550 </tr> 635 551 <tr> … … 638 554 <td>✓</td> 639 555 <td>DS_WRITE2ST64_B64</td> 640 <td>DS_WRITE2ST64_B64</td>641 556 </tr> 642 557 <tr> … … 645 560 <td>✓</td> 646 561 <td>DS_CMPST_B64</td> 647 <td>DS_CMPST_B64</td>648 562 </tr> 649 563 <tr> … … 652 566 <td>✓</td> 653 567 <td>DS_CMPST_F64</td> 654 <td>DS_CMPST_F64</td>655 568 </tr> 656 569 <tr> … … 659 572 <td>✓</td> 660 573 <td>DS_MIN_F64</td> 661 <td>DS_MIN_F64</td>662 574 </tr> 663 575 <tr> … … 666 578 <td>✓</td> 667 579 <td>DS_MAX_F64</td> 668 <td>DS_MAX_F64</td>669 580 </tr> 670 581 <tr> … … 673 584 <td>✓</td> 674 585 <td>DS_ADD_RTN_U64</td> 675 <td>DS_ADD_RTN_U64</td>676 586 </tr> 677 587 <tr> … … 680 590 <td>✓</td> 681 591 <td>DS_SUB_RTN_U64</td> 682 <td>DS_SUB_RTN_U64</td>683 592 </tr> 684 593 <tr> … … 687 596 <td>✓</td> 688 597 <td>DS_RSUB_RTN_U64</td> 689 <td>DS_RSUB_RTN_U64</td>690 598 </tr> 691 599 <tr> … … 694 602 <td>✓</td> 695 603 <td>DS_INC_RTN_U64</td> 696 <td>DS_INC_RTN_U64</td>697 604 </tr> 698 605 <tr> … … 701 608 <td>✓</td> 702 609 <td>DS_DEC_RTN_U64</td> 703 <td>DS_DEC_RTN_U64</td>704 610 </tr> 705 611 <tr> … … 708 614 <td>✓</td> 709 615 <td>DS_MIN_RTN_I64</td> 710 <td>DS_MIN_RTN_I64</td>711 616 </tr> 712 617 <tr> … … 715 620 <td>✓</td> 716 621 <td>DS_MAX_RTN_I64</td> 717 <td>DS_MAX_RTN_I64</td>718 622 </tr> 719 623 <tr> … … 722 626 <td>✓</td> 723 627 <td>DS_MIN_RTN_U64</td> 724 <td>DS_MIN_RTN_U64</td>725 628 </tr> 726 629 <tr> … … 729 632 <td>✓</td> 730 633 <td>DS_MAX_RTN_U64</td> 731 <td>DS_MAX_RTN_U64</td>732 634 </tr> 733 635 <tr> … … 736 638 <td>✓</td> 737 639 <td>DS_AND_RTN_B64</td> 738 <td>DS_AND_RTN_B64</td>739 640 </tr> 740 641 <tr> … … 743 644 <td>✓</td> 744 645 <td>DS_OR_RTN_B64</td> 745 <td>DS_OR_RTN_B64</td>746 646 </tr> 747 647 <tr> … … 750 650 <td>✓</td> 751 651 <td>DS_XOR_RTN_B64</td> 752 <td>DS_XOR_RTN_B64</td>753 652 </tr> 754 653 <tr> … … 757 656 <td>✓</td> 758 657 <td>DS_MSKOR_RTN_B64</td> 759 <td>DS_MSKOR_RTN_B64</td>760 658 </tr> 761 659 <tr> … … 764 662 <td>✓</td> 765 663 <td>DS_WRXCHG_RTN_B64</td> 766 <td>DS_WRXCHG_RTN_B64</td>767 664 </tr> 768 665 <tr> … … 771 668 <td>✓</td> 772 669 <td>DS_WRXCHG2_RTN_B64</td> 773 <td>DS_WRXCHG2_RTN_B64</td>774 670 </tr> 775 671 <tr> … … 778 674 <td>✓</td> 779 675 <td>DS_WRXCHG2ST64_RTN_B64</td> 780 <td>DS_WRXCHG2ST64_RTN_B64</td>781 676 </tr> 782 677 <tr> … … 785 680 <td>✓</td> 786 681 <td>DS_CMPST_RTN_B64</td> 787 <td>DS_CMPST_RTN_B64</td>788 682 </tr> 789 683 <tr> … … 792 686 <td>✓</td> 793 687 <td>DS_CMPST_RTN_F64</td> 794 <td>DS_CMPST_RTN_F64</td>795 688 </tr> 796 689 <tr> … … 799 692 <td>✓</td> 800 693 <td>DS_MIN_RTN_F64</td> 801 <td>DS_MIN_RTN_F64</td>802 694 </tr> 803 695 <tr> … … 806 698 <td>✓</td> 807 699 <td>DS_MAX_RTN_F64</td> 808 <td>DS_MAX_RTN_F64</td>809 700 </tr> 810 701 <tr> … … 813 704 <td>✓</td> 814 705 <td>DS_READ_B64</td> 815 <td>DS_READ_B64</td>816 706 </tr> 817 707 <tr> … … 820 710 <td>✓</td> 821 711 <td>DS_READ2_B64</td> 822 <td>DS_READ2_B64</td>823 712 </tr> 824 713 <tr> … … 826 715 <td>✓</td> 827 716 <td>✓</td> 828 <td>DS_READ2ST64_B64</td>829 717 <td>DS_READ2ST64_B64</td> 830 718 </tr> … … 834 722 <td>✓</td> 835 723 <td>DS_CONDXCHG32_RTN_B64</td> 836 <td>DS_CONDXCHG32_RTN_B64</td>837 724 </tr> 838 725 <tr> … … 841 728 <td>✓</td> 842 729 <td>DS_ADD_SRC2_U32</td> 843 <td>DS_ADD_SRC2_U32</td>844 730 </tr> 845 731 <tr> … … 848 734 <td>✓</td> 849 735 <td>DS_SUB_SRC2_U32</td> 850 <td>DS_SUB_SRC2_U32</td>851 736 </tr> 852 737 <tr> … … 855 740 <td>✓</td> 856 741 <td>DS_RSUB_SRC2_U32</td> 857 <td>DS_RSUB_SRC2_U32</td>858 742 </tr> 859 743 <tr> … … 862 746 <td>✓</td> 863 747 <td>DS_INC_SRC2_U32</td> 864 <td>DS_INC_SRC2_U32</td>865 748 </tr> 866 749 <tr> … … 869 752 <td>✓</td> 870 753 <td>DS_DEC_SRC2_U32</td> 871 <td>DS_DEC_SRC2_U32</td>872 754 </tr> 873 755 <tr> … … 876 758 <td>✓</td> 877 759 <td>DS_MIN_SRC2_I32</td> 878 <td>DS_MIN_SRC2_I32</td>879 760 </tr> 880 761 <tr> … … 883 764 <td>✓</td> 884 765 <td>DS_MAX_SRC2_I32</td> 885 <td>DS_MAX_SRC2_I32</td>886 766 </tr> 887 767 <tr> … … 890 770 <td>✓</td> 891 771 <td>DS_MIN_SRC2_U32</td> 892 <td>DS_MIN_SRC2_U32</td>893 772 </tr> 894 773 <tr> … … 897 776 <td>✓</td> 898 777 <td>DS_MAX_SRC2_U32</td> 899 <td>DS_MAX_SRC2_U32</td>900 778 </tr> 901 779 <tr> … … 904 782 <td>✓</td> 905 783 <td>DS_AND_SRC2_B32</td> 906 <td>DS_AND_SRC2_B32</td>907 784 </tr> 908 785 <tr> … … 911 788 <td>✓</td> 912 789 <td>DS_OR_SRC2_B32</td> 913 <td>DS_OR_SRC2_B32</td>914 790 </tr> 915 791 <tr> … … 918 794 <td>✓</td> 919 795 <td>DS_XOR_SRC2_B32</td> 920 <td>DS_XOR_SRC2_B32</td>921 796 </tr> 922 797 <tr> … … 925 800 <td>✓</td> 926 801 <td>DS_WRITE_SRC2_B32</td> 927 <td>DS_WRITE_SRC2_B32</td>928 802 </tr> 929 803 <tr> … … 932 806 <td>✓</td> 933 807 <td>DS_MIN_SRC2_F32</td> 934 <td>DS_MIN_SRC2_F32</td>935 808 </tr> 936 809 <tr> … … 939 812 <td>✓</td> 940 813 <td>DS_MAX_SRC2_F32</td> 941 <td>DS_MAX_SRC2_F32</td>942 </tr>943 <tr>944 <td>149 (0x95)</td>945 <td></td>946 <td></td>947 <td>--</td>948 <td>DS_ADD_SRC2_F32</td>949 </tr>950 <tr>951 <td>152 (0x98)</td>952 <td></td>953 <td></td>954 <td>--</td>955 <td>DS_GWS_SEMA_RELEASE_ALL</td>956 </tr>957 <tr>958 <td>153 (0x99)</td>959 <td></td>960 <td></td>961 <td>--</td>962 <td>DS_GWS_INIT</td>963 </tr>964 <tr>965 <td>154 (0x9a)</td>966 <td></td>967 <td></td>968 <td>--</td>969 <td>DS_GWS_SEMA_V</td>970 </tr>971 <tr>972 <td>155 (0x9b)</td>973 <td></td>974 <td></td>975 <td>--</td>976 <td>DS_GWS_SEMA_BR</td>977 </tr>978 <tr>979 <td>156 (0x9c)</td>980 <td></td>981 <td></td>982 <td>--</td>983 <td>DS_GWS_SEMA_P</td>984 </tr>985 <tr>986 <td>157 (0x9d)</td>987 <td></td>988 <td></td>989 <td>--</td>990 <td>DS_GWS_BARRIER</td>991 </tr>992 <tr>993 <td>189 (0xbd)</td>994 <td></td>995 <td></td>996 <td>--</td>997 <td>DS_CONSUME</td>998 </tr>999 <tr>1000 <td>190 (0xbe)</td>1001 <td></td>1002 <td></td>1003 <td>--</td>1004 <td>DS_APPEND</td>1005 </tr>1006 <tr>1007 <td>191 (0xbf)</td>1008 <td></td>1009 <td></td>1010 <td>--</td>1011 <td>DS_ORDERED_COUNT</td>1012 814 </tr> 1013 815 <tr> … … 1016 818 <td>✓</td> 1017 819 <td>DS_ADD_SRC2_U64</td> 1018 <td>DS_ADD_SRC2_U64</td>1019 820 </tr> 1020 821 <tr> … … 1023 824 <td>✓</td> 1024 825 <td>DS_SUB_SRC2_U64</td> 1025 <td>DS_SUB_SRC2_U64</td>1026 826 </tr> 1027 827 <tr> … … 1030 830 <td>✓</td> 1031 831 <td>DS_RSUB_SRC2_U64</td> 1032 <td>DS_RSUB_SRC2_U64</td>1033 832 </tr> 1034 833 <tr> … … 1037 836 <td>✓</td> 1038 837 <td>DS_INC_SRC2_U64</td> 1039 <td>DS_INC_SRC2_U64</td>1040 838 </tr> 1041 839 <tr> … … 1044 842 <td>✓</td> 1045 843 <td>DS_DEC_SRC2_U64</td> 1046 <td>DS_DEC_SRC2_U64</td>1047 844 </tr> 1048 845 <tr> … … 1051 848 <td>✓</td> 1052 849 <td>DS_MIN_SRC2_I64</td> 1053 <td>DS_MIN_SRC2_I64</td>1054 850 </tr> 1055 851 <tr> … … 1058 854 <td>✓</td> 1059 855 <td>DS_MAX_SRC2_I64</td> 1060 <td>DS_MAX_SRC2_I64</td>1061 856 </tr> 1062 857 <tr> … … 1065 860 <td>✓</td> 1066 861 <td>DS_MIN_SRC2_U64</td> 1067 <td>DS_MIN_SRC2_U64</td>1068 862 </tr> 1069 863 <tr> … … 1072 866 <td>✓</td> 1073 867 <td>DS_MAX_SRC2_U64</td> 1074 <td>DS_MAX_SRC2_U64</td>1075 868 </tr> 1076 869 <tr> … … 1079 872 <td>✓</td> 1080 873 <td>DS_AND_SRC2_B64</td> 1081 <td>DS_AND_SRC2_B64</td>1082 874 </tr> 1083 875 <tr> … … 1086 878 <td>✓</td> 1087 879 <td>DS_OR_SRC2_B64</td> 1088 <td>DS_OR_SRC2_B64</td>1089 880 </tr> 1090 881 <tr> … … 1093 884 <td>✓</td> 1094 885 <td>DS_XOR_SRC2_B64</td> 1095 <td>DS_XOR_SRC2_B64</td>1096 886 </tr> 1097 887 <tr> … … 1100 890 <td>✓</td> 1101 891 <td>DS_WRITE_SRC2_B64</td> 1102 <td>DS_WRITE_SRC2_B64</td>1103 892 </tr> 1104 893 <tr> … … 1107 896 <td>✓</td> 1108 897 <td>DS_MIN_SRC2_F64</td> 1109 <td>DS_MIN_SRC2_F64</td>1110 898 </tr> 1111 899 <tr> … … 1113 901 <td>✓</td> 1114 902 <td>✓</td> 1115 <td>DS_MAX_SRC2_F64</td>1116 903 <td>DS_MAX_SRC2_F64</td> 1117 904 </tr> … … 1121 908 <td>✓</td> 1122 909 <td>DS_WRITE_B96</td> 1123 <td>DS_WRITE_B96</td>1124 910 </tr> 1125 911 <tr> … … 1128 914 <td>✓</td> 1129 915 <td>DS_WRITE_B128</td> 1130 <td>DS_WRITE_B128</td>1131 916 </tr> 1132 917 <tr> … … 1135 920 <td>✓</td> 1136 921 <td>DS_CONDXCHG32_RTN_B128</td> 1137 <td>DS_CONDXCHG32_RTN_B128</td>1138 922 </tr> 1139 923 <tr> … … 1142 926 <td>✓</td> 1143 927 <td>DS_READ_B96</td> 1144 <td>DS_READ_B96</td>1145 928 </tr> 1146 929 <tr> … … 1149 932 <td>✓</td> 1150 933 <td>DS_READ_B128</td> 934 </tr> 935 </tbody> 936 </table> 937 <p>List of the instructions by opcode (GCN 1.2/1.3):</p> 938 <table> 939 <thead> 940 <tr> 941 <th>Opcode</th> 942 <th>GCN 1.0</th> 943 <th>GCN 1.1</th> 944 <th>Mnemonic</th> 945 </tr> 946 </thead> 947 <tbody> 948 <tr> 949 <td>0 (0x0)</td> 950 <td>✓</td> 951 <td>✓</td> 952 <td>DS_ADD_U32</td> 953 </tr> 954 <tr> 955 <td>1 (0x1)</td> 956 <td>✓</td> 957 <td>✓</td> 958 <td>DS_SUB_U32</td> 959 </tr> 960 <tr> 961 <td>2 (0x2)</td> 962 <td>✓</td> 963 <td>✓</td> 964 <td>DS_RSUB_U32</td> 965 </tr> 966 <tr> 967 <td>3 (0x3)</td> 968 <td>✓</td> 969 <td>✓</td> 970 <td>DS_INC_U32</td> 971 </tr> 972 <tr> 973 <td>4 (0x4)</td> 974 <td>✓</td> 975 <td>✓</td> 976 <td>DS_DEC_U32</td> 977 </tr> 978 <tr> 979 <td>5 (0x5)</td> 980 <td>✓</td> 981 <td>✓</td> 982 <td>DS_MIN_I32</td> 983 </tr> 984 <tr> 985 <td>6 (0x6)</td> 986 <td>✓</td> 987 <td>✓</td> 988 <td>DS_MAX_I32</td> 989 </tr> 990 <tr> 991 <td>7 (0x7)</td> 992 <td>✓</td> 993 <td>✓</td> 994 <td>DS_MIN_U32</td> 995 </tr> 996 <tr> 997 <td>8 (0x8)</td> 998 <td>✓</td> 999 <td>✓</td> 1000 <td>DS_MAX_U32</td> 1001 </tr> 1002 <tr> 1003 <td>9 (0x9)</td> 1004 <td>✓</td> 1005 <td>✓</td> 1006 <td>DS_AND_B32</td> 1007 </tr> 1008 <tr> 1009 <td>10 (0xa)</td> 1010 <td>✓</td> 1011 <td>✓</td> 1012 <td>DS_OR_B32</td> 1013 </tr> 1014 <tr> 1015 <td>11 (0xb)</td> 1016 <td>✓</td> 1017 <td>✓</td> 1018 <td>DS_XOR_B32</td> 1019 </tr> 1020 <tr> 1021 <td>12 (0xc)</td> 1022 <td>✓</td> 1023 <td>✓</td> 1024 <td>DS_MSKOR_B32</td> 1025 </tr> 1026 <tr> 1027 <td>13 (0xd)</td> 1028 <td>✓</td> 1029 <td>✓</td> 1030 <td>DS_WRITE_B32</td> 1031 </tr> 1032 <tr> 1033 <td>14 (0xe)</td> 1034 <td>✓</td> 1035 <td>✓</td> 1036 <td>DS_WRITE2_B32</td> 1037 </tr> 1038 <tr> 1039 <td>15 (0xf)</td> 1040 <td>✓</td> 1041 <td>✓</td> 1042 <td>DS_WRITE2ST64_B32</td> 1043 </tr> 1044 <tr> 1045 <td>16 (0x10)</td> 1046 <td>✓</td> 1047 <td>✓</td> 1048 <td>DS_CMPST_B32</td> 1049 </tr> 1050 <tr> 1051 <td>17 (0x11)</td> 1052 <td>✓</td> 1053 <td>✓</td> 1054 <td>DS_CMPST_F32</td> 1055 </tr> 1056 <tr> 1057 <td>18 (0x12)</td> 1058 <td>✓</td> 1059 <td>✓</td> 1060 <td>DS_MIN_F32</td> 1061 </tr> 1062 <tr> 1063 <td>19 (0x13)</td> 1064 <td>✓</td> 1065 <td>✓</td> 1066 <td>DS_MAX_F32</td> 1067 </tr> 1068 <tr> 1069 <td>20 (0x14)</td> 1070 <td>✓</td> 1071 <td>✓</td> 1072 <td>DS_NOP</td> 1073 </tr> 1074 <tr> 1075 <td>21 (0x15)</td> 1076 <td>✓</td> 1077 <td>✓</td> 1078 <td>DS_ADD_F32</td> 1079 </tr> 1080 <tr> 1081 <td>29 (0x1d)</td> 1082 <td></td> 1083 <td>✓</td> 1084 <td>DS_WRITE_ADDTID_B32</td> 1085 </tr> 1086 <tr> 1087 <td>30 (0x1e)</td> 1088 <td>✓</td> 1089 <td>✓</td> 1090 <td>DS_WRITE_B8</td> 1091 </tr> 1092 <tr> 1093 <td>31 (0x1f)</td> 1094 <td>✓</td> 1095 <td>✓</td> 1096 <td>DS_WRITE_B16</td> 1097 </tr> 1098 <tr> 1099 <td>32 (0x20)</td> 1100 <td>✓</td> 1101 <td>✓</td> 1102 <td>DS_ADD_RTN_U32</td> 1103 </tr> 1104 <tr> 1105 <td>33 (0x21)</td> 1106 <td>✓</td> 1107 <td>✓</td> 1108 <td>DS_SUB_RTN_U32</td> 1109 </tr> 1110 <tr> 1111 <td>34 (0x22)</td> 1112 <td>✓</td> 1113 <td>✓</td> 1114 <td>DS_RSUB_RTN_U32</td> 1115 </tr> 1116 <tr> 1117 <td>35 (0x23)</td> 1118 <td>✓</td> 1119 <td>✓</td> 1120 <td>DS_INC_RTN_U32</td> 1121 </tr> 1122 <tr> 1123 <td>36 (0x24)</td> 1124 <td>✓</td> 1125 <td>✓</td> 1126 <td>DS_DEC_RTN_U32</td> 1127 </tr> 1128 <tr> 1129 <td>37 (0x25)</td> 1130 <td>✓</td> 1131 <td>✓</td> 1132 <td>DS_MIN_RTN_I32</td> 1133 </tr> 1134 <tr> 1135 <td>38 (0x26)</td> 1136 <td>✓</td> 1137 <td>✓</td> 1138 <td>DS_MAX_RTN_I32</td> 1139 </tr> 1140 <tr> 1141 <td>39 (0x27)</td> 1142 <td>✓</td> 1143 <td>✓</td> 1144 <td>DS_MIN_RTN_U32</td> 1145 </tr> 1146 <tr> 1147 <td>40 (0x28)</td> 1148 <td>✓</td> 1149 <td>✓</td> 1150 <td>DS_MAX_RTN_U32</td> 1151 </tr> 1152 <tr> 1153 <td>41 (0x29)</td> 1154 <td>✓</td> 1155 <td>✓</td> 1156 <td>DS_AND_RTN_B32</td> 1157 </tr> 1158 <tr> 1159 <td>42 (0x2a)</td> 1160 <td>✓</td> 1161 <td>✓</td> 1162 <td>DS_OR_RTN_B32</td> 1163 </tr> 1164 <tr> 1165 <td>43 (0x2b)</td> 1166 <td>✓</td> 1167 <td>✓</td> 1168 <td>DS_XOR_RTN_B32</td> 1169 </tr> 1170 <tr> 1171 <td>44 (0x2c)</td> 1172 <td>✓</td> 1173 <td>✓</td> 1174 <td>DS_MSKOR_RTN_B32</td> 1175 </tr> 1176 <tr> 1177 <td>45 (0x2d)</td> 1178 <td>✓</td> 1179 <td>✓</td> 1180 <td>DS_WRXCHG_RTN_B32</td> 1181 </tr> 1182 <tr> 1183 <td>46 (0x2e)</td> 1184 <td>✓</td> 1185 <td>✓</td> 1186 <td>DS_WRXCHG2_RTN_B32</td> 1187 </tr> 1188 <tr> 1189 <td>47 (0x2f)</td> 1190 <td>✓</td> 1191 <td>✓</td> 1192 <td>DS_WRXCHG2ST64_RTN_B32</td> 1193 </tr> 1194 <tr> 1195 <td>48 (0x30)</td> 1196 <td>✓</td> 1197 <td>✓</td> 1198 <td>DS_CMPST_RTN_B32</td> 1199 </tr> 1200 <tr> 1201 <td>49 (0x31)</td> 1202 <td>✓</td> 1203 <td>✓</td> 1204 <td>DS_CMPST_RTN_F32</td> 1205 </tr> 1206 <tr> 1207 <td>50 (0x32)</td> 1208 <td>✓</td> 1209 <td>✓</td> 1210 <td>DS_MIN_RTN_F32</td> 1211 </tr> 1212 <tr> 1213 <td>51 (0x33)</td> 1214 <td></td> 1215 <td>✓</td> 1216 <td>DS_MAX_RTN_F32</td> 1217 </tr> 1218 <tr> 1219 <td>52 (0x34)</td> 1220 <td>✓</td> 1221 <td>✓</td> 1222 <td>DS_WRAP_RTN_B32</td> 1223 </tr> 1224 <tr> 1225 <td>53 (0x35)</td> 1226 <td>✓</td> 1227 <td>✓</td> 1228 <td>DS_ADD_RTN_F32</td> 1229 </tr> 1230 <tr> 1231 <td>54 (0x36)</td> 1232 <td>✓</td> 1233 <td>✓</td> 1234 <td>DS_READ_B32</td> 1235 </tr> 1236 <tr> 1237 <td>55 (0x37)</td> 1238 <td>✓</td> 1239 <td>✓</td> 1240 <td>DS_READ2_B32</td> 1241 </tr> 1242 <tr> 1243 <td>56 (0x38)</td> 1244 <td>✓</td> 1245 <td>✓</td> 1246 <td>DS_READ2ST64_B32</td> 1247 </tr> 1248 <tr> 1249 <td>57 (0x39)</td> 1250 <td>✓</td> 1251 <td>✓</td> 1252 <td>DS_READ_I8</td> 1253 </tr> 1254 <tr> 1255 <td>58 (0x3a)</td> 1256 <td>✓</td> 1257 <td>✓</td> 1258 <td>DS_READ_U8</td> 1259 </tr> 1260 <tr> 1261 <td>59 (0x3b)</td> 1262 <td>✓</td> 1263 <td>✓</td> 1264 <td>DS_READ_I16</td> 1265 </tr> 1266 <tr> 1267 <td>60 (0x3c)</td> 1268 <td>✓</td> 1269 <td>✓</td> 1270 <td>DS_READ_U16</td> 1271 </tr> 1272 <tr> 1273 <td>61 (0x3d)</td> 1274 <td>✓</td> 1275 <td>✓</td> 1276 <td>DS_SWIZZLE_B32</td> 1277 </tr> 1278 <tr> 1279 <td>62 (0x3e)</td> 1280 <td>✓</td> 1281 <td>✓</td> 1282 <td>DS_PERMUTE_B32</td> 1283 </tr> 1284 <tr> 1285 <td>63 (0x3f)</td> 1286 <td>✓</td> 1287 <td>✓</td> 1288 <td>DS_BPERMUTE_B32</td> 1289 </tr> 1290 <tr> 1291 <td>64 (0x40)</td> 1292 <td>✓</td> 1293 <td>✓</td> 1294 <td>DS_ADD_U64</td> 1295 </tr> 1296 <tr> 1297 <td>65 (0x41)</td> 1298 <td>✓</td> 1299 <td>✓</td> 1300 <td>DS_SUB_U64</td> 1301 </tr> 1302 <tr> 1303 <td>66 (0x42)</td> 1304 <td>✓</td> 1305 <td>✓</td> 1306 <td>DS_RSUB_U64</td> 1307 </tr> 1308 <tr> 1309 <td>67 (0x43)</td> 1310 <td>✓</td> 1311 <td>✓</td> 1312 <td>DS_INC_U64</td> 1313 </tr> 1314 <tr> 1315 <td>68 (0x44)</td> 1316 <td>✓</td> 1317 <td>✓</td> 1318 <td>DS_DEC_U64</td> 1319 </tr> 1320 <tr> 1321 <td>69 (0x45)</td> 1322 <td>✓</td> 1323 <td>✓</td> 1324 <td>DS_MIN_I64</td> 1325 </tr> 1326 <tr> 1327 <td>70 (0x46)</td> 1328 <td>✓</td> 1329 <td>✓</td> 1330 <td>DS_MAX_I64</td> 1331 </tr> 1332 <tr> 1333 <td>71 (0x47)</td> 1334 <td>✓</td> 1335 <td>✓</td> 1336 <td>DS_MIN_U64</td> 1337 </tr> 1338 <tr> 1339 <td>72 (0x48)</td> 1340 <td>✓</td> 1341 <td>✓</td> 1342 <td>DS_MAX_U64</td> 1343 </tr> 1344 <tr> 1345 <td>73 (0x49)</td> 1346 <td>✓</td> 1347 <td>✓</td> 1348 <td>DS_AND_B64</td> 1349 </tr> 1350 <tr> 1351 <td>74 (0x4a)</td> 1352 <td>✓</td> 1353 <td>✓</td> 1354 <td>DS_OR_B64</td> 1355 </tr> 1356 <tr> 1357 <td>75 (0x4b)</td> 1358 <td>✓</td> 1359 <td>✓</td> 1360 <td>DS_XOR_B64</td> 1361 </tr> 1362 <tr> 1363 <td>76 (0x4c)</td> 1364 <td>✓</td> 1365 <td>✓</td> 1366 <td>DS_MSKOR_B64</td> 1367 </tr> 1368 <tr> 1369 <td>77 (0x4d)</td> 1370 <td>✓</td> 1371 <td>✓</td> 1372 <td>DS_WRITE_B64</td> 1373 </tr> 1374 <tr> 1375 <td>78 (0x4e)</td> 1376 <td>✓</td> 1377 <td>✓</td> 1378 <td>DS_WRITE2_B64</td> 1379 </tr> 1380 <tr> 1381 <td>79 (0x4f)</td> 1382 <td>✓</td> 1383 <td>✓</td> 1384 <td>DS_WRITE2ST64_B64</td> 1385 </tr> 1386 <tr> 1387 <td>80 (0x50)</td> 1388 <td>✓</td> 1389 <td>✓</td> 1390 <td>DS_CMPST_B64</td> 1391 </tr> 1392 <tr> 1393 <td>81 (0x51)</td> 1394 <td>✓</td> 1395 <td>✓</td> 1396 <td>DS_CMPST_F64</td> 1397 </tr> 1398 <tr> 1399 <td>82 (0x52)</td> 1400 <td>✓</td> 1401 <td>✓</td> 1402 <td>DS_MIN_F64</td> 1403 </tr> 1404 <tr> 1405 <td>83 (0x53)</td> 1406 <td>✓</td> 1407 <td>✓</td> 1408 <td>DS_MAX_F64</td> 1409 </tr> 1410 <tr> 1411 <td>96 (0x60)</td> 1412 <td>✓</td> 1413 <td>✓</td> 1414 <td>DS_ADD_RTN_U64</td> 1415 </tr> 1416 <tr> 1417 <td>97 (0x61)</td> 1418 <td>✓</td> 1419 <td>✓</td> 1420 <td>DS_SUB_RTN_U64</td> 1421 </tr> 1422 <tr> 1423 <td>98 (0x62)</td> 1424 <td>✓</td> 1425 <td>✓</td> 1426 <td>DS_RSUB_RTN_U64</td> 1427 </tr> 1428 <tr> 1429 <td>99 (0x63)</td> 1430 <td>✓</td> 1431 <td>✓</td> 1432 <td>DS_INC_RTN_U64</td> 1433 </tr> 1434 <tr> 1435 <td>100 (0x64)</td> 1436 <td>✓</td> 1437 <td>✓</td> 1438 <td>DS_DEC_RTN_U64</td> 1439 </tr> 1440 <tr> 1441 <td>101 (0x65)</td> 1442 <td>✓</td> 1443 <td>✓</td> 1444 <td>DS_MIN_RTN_I64</td> 1445 </tr> 1446 <tr> 1447 <td>102 (0x66)</td> 1448 <td>✓</td> 1449 <td>✓</td> 1450 <td>DS_MAX_RTN_I64</td> 1451 </tr> 1452 <tr> 1453 <td>103 (0x67)</td> 1454 <td>✓</td> 1455 <td>✓</td> 1456 <td>DS_MIN_RTN_U64</td> 1457 </tr> 1458 <tr> 1459 <td>104 (0x68)</td> 1460 <td>✓</td> 1461 <td>✓</td> 1462 <td>DS_MAX_RTN_U64</td> 1463 </tr> 1464 <tr> 1465 <td>105 (0x69)</td> 1466 <td>✓</td> 1467 <td>✓</td> 1468 <td>DS_AND_RTN_B64</td> 1469 </tr> 1470 <tr> 1471 <td>106 (0x6a)</td> 1472 <td>✓</td> 1473 <td>✓</td> 1474 <td>DS_OR_RTN_B64</td> 1475 </tr> 1476 <tr> 1477 <td>107 (0x6b)</td> 1478 <td>✓</td> 1479 <td>✓</td> 1480 <td>DS_XOR_RTN_B64</td> 1481 </tr> 1482 <tr> 1483 <td>108 (0x6c)</td> 1484 <td>✓</td> 1485 <td>✓</td> 1486 <td>DS_MSKOR_RTN_B64</td> 1487 </tr> 1488 <tr> 1489 <td>109 (0x6d)</td> 1490 <td>✓</td> 1491 <td>✓</td> 1492 <td>DS_WRXCHG_RTN_B64</td> 1493 </tr> 1494 <tr> 1495 <td>110 (0x6e)</td> 1496 <td>✓</td> 1497 <td>✓</td> 1498 <td>DS_WRXCHG2_RTN_B64</td> 1499 </tr> 1500 <tr> 1501 <td>111 (0x6f)</td> 1502 <td>✓</td> 1503 <td>✓</td> 1504 <td>DS_WRXCHG2ST64_RTN_B64</td> 1505 </tr> 1506 <tr> 1507 <td>112 (0x70)</td> 1508 <td>✓</td> 1509 <td>✓</td> 1510 <td>DS_CMPST_RTN_B64</td> 1511 </tr> 1512 <tr> 1513 <td>113 (0x71)</td> 1514 <td>✓</td> 1515 <td>✓</td> 1516 <td>DS_CMPST_RTN_F64</td> 1517 </tr> 1518 <tr> 1519 <td>114 (0x72)</td> 1520 <td>✓</td> 1521 <td>✓</td> 1522 <td>DS_MIN_RTN_F64</td> 1523 </tr> 1524 <tr> 1525 <td>115 (0x73)</td> 1526 <td>✓</td> 1527 <td>✓</td> 1528 <td>DS_MAX_RTN_F64</td> 1529 </tr> 1530 <tr> 1531 <td>118 (0x76)</td> 1532 <td>✓</td> 1533 <td>✓</td> 1534 <td>DS_READ_B64</td> 1535 </tr> 1536 <tr> 1537 <td>119 (0x77)</td> 1538 <td>✓</td> 1539 <td>✓</td> 1540 <td>DS_READ2_B64</td> 1541 </tr> 1542 <tr> 1543 <td>120 (0x78)</td> 1544 <td>✓</td> 1545 <td>✓</td> 1546 <td>DS_READ2ST64_B64</td> 1547 </tr> 1548 <tr> 1549 <td>126 (0x7e)</td> 1550 <td>✓</td> 1551 <td>✓</td> 1552 <td>DS_CONDXCHG32_RTN_B64</td> 1553 </tr> 1554 <tr> 1555 <td>128 (0x80)</td> 1556 <td>✓</td> 1557 <td>✓</td> 1558 <td>DS_ADD_SRC2_U32</td> 1559 </tr> 1560 <tr> 1561 <td>129 (0x81)</td> 1562 <td>✓</td> 1563 <td>✓</td> 1564 <td>DS_SUB_SRC2_U32</td> 1565 </tr> 1566 <tr> 1567 <td>130 (0x82)</td> 1568 <td>✓</td> 1569 <td>✓</td> 1570 <td>DS_RSUB_SRC2_U32</td> 1571 </tr> 1572 <tr> 1573 <td>131 (0x83)</td> 1574 <td>✓</td> 1575 <td>✓</td> 1576 <td>DS_INC_SRC2_U32</td> 1577 </tr> 1578 <tr> 1579 <td>132 (0x84)</td> 1580 <td>✓</td> 1581 <td>✓</td> 1582 <td>DS_DEC_SRC2_U32</td> 1583 </tr> 1584 <tr> 1585 <td>133 (0x85)</td> 1586 <td>✓</td> 1587 <td>✓</td> 1588 <td>DS_MIN_SRC2_I32</td> 1589 </tr> 1590 <tr> 1591 <td>134 (0x86)</td> 1592 <td>✓</td> 1593 <td>✓</td> 1594 <td>DS_MAX_SRC2_I32</td> 1595 </tr> 1596 <tr> 1597 <td>135 (0x87)</td> 1598 <td>✓</td> 1599 <td>✓</td> 1600 <td>DS_MIN_SRC2_U32</td> 1601 </tr> 1602 <tr> 1603 <td>136 (0x88)</td> 1604 <td>✓</td> 1605 <td>✓</td> 1606 <td>DS_MAX_SRC2_U32</td> 1607 </tr> 1608 <tr> 1609 <td>137 (0x89)</td> 1610 <td>✓</td> 1611 <td>✓</td> 1612 <td>DS_AND_SRC2_B32</td> 1613 </tr> 1614 <tr> 1615 <td>138 (0x8a)</td> 1616 <td>✓</td> 1617 <td>✓</td> 1618 <td>DS_OR_SRC2_B32</td> 1619 </tr> 1620 <tr> 1621 <td>139 (0x8b)</td> 1622 <td>✓</td> 1623 <td>✓</td> 1624 <td>DS_XOR_SRC2_B32</td> 1625 </tr> 1626 <tr> 1627 <td>141 (0x8d)</td> 1628 <td>✓</td> 1629 <td>✓</td> 1630 <td>DS_WRITE_SRC2_B32</td> 1631 </tr> 1632 <tr> 1633 <td>146 (0x92)</td> 1634 <td>✓</td> 1635 <td>✓</td> 1636 <td>DS_MIN_SRC2_F32</td> 1637 </tr> 1638 <tr> 1639 <td>147 (0x93)</td> 1640 <td>✓</td> 1641 <td>✓</td> 1642 <td>DS_MAX_SRC2_F32</td> 1643 </tr> 1644 <tr> 1645 <td>149 (0x95)</td> 1646 <td>✓</td> 1647 <td>✓</td> 1648 <td>DS_ADD_SRC2_F32</td> 1649 </tr> 1650 <tr> 1651 <td>152 (0x98)</td> 1652 <td>✓</td> 1653 <td>✓</td> 1654 <td>DS_GWS_SEMA_RELEASE_ALL</td> 1655 </tr> 1656 <tr> 1657 <td>153 (0x99)</td> 1658 <td>✓</td> 1659 <td>✓</td> 1660 <td>DS_GWS_INIT</td> 1661 </tr> 1662 <tr> 1663 <td>154 (0x9a)</td> 1664 <td>✓</td> 1665 <td>✓</td> 1666 <td>DS_GWS_SEMA_V</td> 1667 </tr> 1668 <tr> 1669 <td>155 (0x9b)</td> 1670 <td>✓</td> 1671 <td>✓</td> 1672 <td>DS_GWS_SEMA_BR</td> 1673 </tr> 1674 <tr> 1675 <td>156 (0x9c)</td> 1676 <td>✓</td> 1677 <td>✓</td> 1678 <td>DS_GWS_SEMA_P</td> 1679 </tr> 1680 <tr> 1681 <td>157 (0x9d)</td> 1682 <td>✓</td> 1683 <td>✓</td> 1684 <td>DS_GWS_BARRIER</td> 1685 </tr> 1686 <tr> 1687 <td>182 (0xb6)</td> 1688 <td></td> 1689 <td>✓</td> 1690 <td>DS_READ_ADDTID_B32</td> 1691 </tr> 1692 <tr> 1693 <td>189 (0xbd)</td> 1694 <td>✓</td> 1695 <td>✓</td> 1696 <td>DS_CONSUME</td> 1697 </tr> 1698 <tr> 1699 <td>190 (0xbe)</td> 1700 <td>✓</td> 1701 <td>✓</td> 1702 <td>DS_APPEND</td> 1703 </tr> 1704 <tr> 1705 <td>191 (0xbf)</td> 1706 <td>✓</td> 1707 <td>✓</td> 1708 <td>DS_ORDERED_COUNT</td> 1709 </tr> 1710 <tr> 1711 <td>192 (0xc0)</td> 1712 <td>✓</td> 1713 <td>✓</td> 1714 <td>DS_ADD_SRC2_U64</td> 1715 </tr> 1716 <tr> 1717 <td>193 (0xc1)</td> 1718 <td>✓</td> 1719 <td>✓</td> 1720 <td>DS_SUB_SRC2_U64</td> 1721 </tr> 1722 <tr> 1723 <td>194 (0xc2)</td> 1724 <td>✓</td> 1725 <td>✓</td> 1726 <td>DS_RSUB_SRC2_U64</td> 1727 </tr> 1728 <tr> 1729 <td>195 (0xc3)</td> 1730 <td>✓</td> 1731 <td>✓</td> 1732 <td>DS_INC_SRC2_U64</td> 1733 </tr> 1734 <tr> 1735 <td>196 (0xc4)</td> 1736 <td>✓</td> 1737 <td>✓</td> 1738 <td>DS_DEC_SRC2_U64</td> 1739 </tr> 1740 <tr> 1741 <td>197 (0xc5)</td> 1742 <td>✓</td> 1743 <td>✓</td> 1744 <td>DS_MIN_SRC2_I64</td> 1745 </tr> 1746 <tr> 1747 <td>198 (0xc6)</td> 1748 <td>✓</td> 1749 <td>✓</td> 1750 <td>DS_MAX_SRC2_I64</td> 1751 </tr> 1752 <tr> 1753 <td>199 (0xc7)</td> 1754 <td>✓</td> 1755 <td>✓</td> 1756 <td>DS_MIN_SRC2_U64</td> 1757 </tr> 1758 <tr> 1759 <td>200 (0xc8)</td> 1760 <td>✓</td> 1761 <td>✓</td> 1762 <td>DS_MAX_SRC2_U64</td> 1763 </tr> 1764 <tr> 1765 <td>201 (0xc9)</td> 1766 <td>✓</td> 1767 <td>✓</td> 1768 <td>DS_AND_SRC2_B64</td> 1769 </tr> 1770 <tr> 1771 <td>202 (0xca)</td> 1772 <td>✓</td> 1773 <td>✓</td> 1774 <td>DS_OR_SRC2_B64</td> 1775 </tr> 1776 <tr> 1777 <td>203 (0xcb)</td> 1778 <td>✓</td> 1779 <td>✓</td> 1780 <td>DS_XOR_SRC2_B64</td> 1781 </tr> 1782 <tr> 1783 <td>205 (0xcd)</td> 1784 <td>✓</td> 1785 <td>✓</td> 1786 <td>DS_WRITE_SRC2_B64</td> 1787 </tr> 1788 <tr> 1789 <td>210 (0xd2)</td> 1790 <td>✓</td> 1791 <td>✓</td> 1792 <td>DS_MIN_SRC2_F64</td> 1793 </tr> 1794 <tr> 1795 <td>211 (0xd3)</td> 1796 <td>✓</td> 1797 <td>✓</td> 1798 <td>DS_MAX_SRC2_F64</td> 1799 </tr> 1800 <tr> 1801 <td>222 (0xde)</td> 1802 <td>✓</td> 1803 <td>✓</td> 1804 <td>DS_WRITE_B96</td> 1805 </tr> 1806 <tr> 1807 <td>223 (0xdf)</td> 1808 <td>✓</td> 1809 <td>✓</td> 1810 <td>DS_WRITE_B128</td> 1811 </tr> 1812 <tr> 1813 <td>253 (0xfd)</td> 1814 <td>✓</td> 1815 <td>✓</td> 1816 <td>DS_CONDXCHG32_RTN_B128</td> 1817 </tr> 1818 <tr> 1819 <td>254 (0xfe)</td> 1820 <td>✓</td> 1821 <td>✓</td> 1822 <td>DS_READ_B96</td> 1823 </tr> 1824 <tr> 1825 <td>255 (0xff)</td> 1826 <td>✓</td> 1827 <td>✓</td> 1151 1828 <td>DS_READ_B128</td> 1152 1829 </tr> … … 1156 1833 <p>Alphabetically sorted instruction list:</p> 1157 1834 <h4>DS_ADD_F32</h4> 1158 <p>Opcode: 21 (0x15) for GCN 1.2 <br />1835 <p>Opcode: 21 (0x15) for GCN 1.2/1.4<br /> 1159 1836 Syntax: DS_ADD_U32 ADDR, VDATA0 [OFFSET:OFFSET]<br /> 1160 1837 Description: Add single float value from LDS/GDS at address (ADDR+OFFSET) & ~3 and … … 1285 1962 *V = *V & *(UINT64*)(DS + B) // atomic operation</code></p> 1286 1963 <h4>DS_APPEND</h4> 1287 <p>Opcode: 62 (0x3e) for GCN 1.0/1.1; 190 (0xbe) GCN 1.2 <br />1964 <p>Opcode: 62 (0x3e) for GCN 1.0/1.1; 190 (0xbe) GCN 1.2/1.4<br /> 1288 1965 Syntax: DS_APPEND VDST [OFFSET:OFFSET]<br /> 1289 1966 Description: Append entries to buffer. This instruction increments 32-bit value in … … 1295 1972 *V += BITCOUNT(EXEC) // scalar operation</code></p> 1296 1973 <h4>DS_BPERMUTE_B32</h4> 1297 <p>Opcode: 63 (0x3f) for GCN 1.2 <br />1974 <p>Opcode: 63 (0x3f) for GCN 1.2/1.4<br /> 1298 1975 Syntax: DS_BPERMUTE_B32 DST, ADDR, SRC [OFFSET:OFFSET]<br /> 1299 1976 Description: Backward permutation for wave. Put value of SRC0 from … … 1312 1989 DST[i] = tmp[i]</code></p> 1313 1990 <h4>DS_CONSUME</h4> 1314 <p>Opcode: 61 (0x3d) for GCN 1.0/1.1; 189 (0xbd) GCN 1.2 <br />1991 <p>Opcode: 61 (0x3d) for GCN 1.0/1.1; 189 (0xbd) GCN 1.2/1.4<br /> 1315 1992 Syntax: DS_CONSUME VDST [OFFSET:OFFSET]<br /> 1316 1993 Description: Consume entries to buffer. This instruction increments 32-bit value in … … 1945 2622 VDST = *V; *V = (*V & ~VDATA0) | VDATA1 // atomic operation</code></p> 1946 2623 <h4>DS_NOP</h4> 1947 <p>Opcode: 20 (0x14) for GCN 1.1/1.2 <br />2624 <p>Opcode: 20 (0x14) for GCN 1.1/1.2/1.4<br /> 1948 2625 Syntax: DS_NOP VADDR<br /> 1949 2626 Description: Do nothing.</p> … … 2009 2686 *V = *V | *(UINT64*)(DS + B) // atomic operation</code></p> 2010 2687 <h4>DS_PERMUTE_B32</h4> 2011 <p>Opcode: 62 (0x3e) for GCN 1.2 <br />2688 <p>Opcode: 62 (0x3e) for GCN 1.2/1.4<br /> 2012 2689 Syntax: DS_PERMUTE_B32 DST, ADDR, SRC [OFFSET:OFFSET]<br /> 2013 2690 Description: Forward permutation for wave. Put value of SRC0 from LANEID to DST register in … … 2022 2699 if (EXEC & (1ULL<<i) != 0) 2023 2700 DST[i] = tmp[i]</code></p> 2701 <h4>DS_READ_ADDTID_B32</h4> 2702 <p>Opcode: 182 (0xb6) for GCN 1.4<br /> 2703 Syntax: DS_READ_ADDTID_B32 VDST<br /> 2704 Operation: Read single dword from LDS/GDS at address (M0&0xffff) + OFFSET + LANEID*4 and 2705 store into VDST.<br /> 2706 Operation:<br /> 2707 <code>VDST = *(UINT32*)(DS + (M0&0xffff) + OFFSET + LANEID*4)</code></p> 2024 2708 <h4>DS_READ_B128</h4> 2025 <p>Opcode: 255 (0xff) for GCN 1.1/1.2 <br />2709 <p>Opcode: 255 (0xff) for GCN 1.1/1.2/1.4<br /> 2026 2710 Syntax: DS_READ_B128 VDST(4), ADDR [OFFSET:OFFSET]<br /> 2027 2711 Description: Read four dwords from LDS/GDS at address (ADDR+OFFSET) & ~15, … … 2034 2718 Syntax: DS_READ_B32 VDST, ADDR [OFFSET:OFFSET]<br /> 2035 2719 Description: Read dword from LDS/GDS at address (ADDR+OFFSET) & ~3 or 2036 (ADDR+OFFSET) for GCN 1.2 , store into VDST.<br />2720 (ADDR+OFFSET) for GCN 1.2/1.4, store into VDST.<br /> 2037 2721 Operation:<br /> 2038 2722 <code>if (GCN14) … … 2051 2735 VDST = *(UINT64*)(DS + ((ADDR+OFFSET)&~7))</code></p> 2052 2736 <h4>DS_READ_B96</h4> 2053 <p>Opcode: 254 (0xfe) for GCN 1.1/1.2 <br />2737 <p>Opcode: 254 (0xfe) for GCN 1.1/1.2/1.4<br /> 2054 2738 Syntax: DS_READ_B96 VDST(3), ADDR [OFFSET:OFFSET]<br /> 2055 2739 Description: Read three dwords from LDS/GDS at address (ADDR+OFFSET) & ~15, … … 2252 2936 *V = *V - VDATA0 // atomic operation</code></p> 2253 2937 <h4>DS_SWIZZLE_B32</h4> 2254 <p>Opcode: 53 (0x35) for GCN 1.0/1.1; 61 (0x3d) for GCN 1.2 <br />2938 <p>Opcode: 53 (0x35) for GCN 1.0/1.1; 61 (0x3d) for GCN 1.2/1.4<br /> 2255 2939 Syntax: DS_SWIZZLE_B32 VDST, ADDR [OFFSET:OFFSET]<br /> 2256 2940 Description: Move between lanes ADDR value storing in VDST. Refer to operation's listing to … … 2271 2955 VDST[LANEID] = (EXEC & (1ULL<<INLANEID)) ? ADDR[INLANEID] : 0</code></p> 2272 2956 <h4>DS_WRAP_RTN_B32</h4> 2273 <p>Opcode: 52 (0x34) for GCN 1.1/1.2 <br />2957 <p>Opcode: 52 (0x34) for GCN 1.1/1.2/1.4<br /> 2274 2958 Syntax: DS_WRAP_RTN_B32 VDST, ADDR, VDATA0, VDATA1 [OFFSET:OFFSET]<br /> 2275 2959 Description: Compare unsigned 32-bit value from LDS/GDS at address A and D0. If value from … … 2280 2964 <code>UINT32 A = (UINT32*)(DS + ((ADDR+OFFSET)&~3)) 2281 2965 VDST = *V; *V = (*V >= VDATA0) ? (*V-VDATA0) : (*V+VDATA1) // atomic operation</code></p> 2966 <h4>DS_WRITE_ADDTID_B32</h4> 2967 <p>Opcode 29 (0x1d) for GCN 1.4<br /> 2968 Syntax: DS_WRITE_ADDTID_B32 VDATA0<br /> 2969 Description: Store single dword value from VDATA0 into LDS/GDS at address 2970 ((M0&0xffff) + OFFSET + 4*LANEID).<br /> 2971 Operation:<br /> 2972 <code>(UINT32*)(DS + (M0&0xffff) + OFFSET + LANEID*4) = VDATA0</code></p> 2282 2973 <h4>DS_WRITE_B128</h4> 2283 <p>Opcode: 223 (0xdf)for GCN 1.1/1.2 <br />2974 <p>Opcode: 223 (0xdf)for GCN 1.1/1.2/1.4<br /> 2284 2975 Syntax: DS_WRITE_B128 ADDR, VDATA0(4) [OFFSET:OFFSET]<br /> 2285 2976 Description: Store four dwords value from VDATA0 into LDS/GDS at address … … 2333 3024 *V = VDATA0&0xff</code></p> 2334 3025 <h4>DS_WRITE_B96</h4> 2335 <p>Opcode: 222 (0xde) for GCN 1.1/1.2 <br />3026 <p>Opcode: 222 (0xde) for GCN 1.1/1.2/1.4<br /> 2336 3027 Syntax: DS_WRITE_B96 ADDR, VDATA0(3) [OFFSET:OFFSET]<br /> 2337 3028 Description: Store three dwords value from VDATA0 into LDS/GDS at address