Changes between Version 3 and Version 4 of GcnInstrsMtbuf


Ignore:
Timestamp:
01/13/16 01:00:15 (8 years ago)
Author:
trac
Comment:

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  • GcnInstrsMtbuf

    v3 v4  
    7070<td>40-47</td>
    7171<td>VDATA</td>
    72 <td>Vector data register</td>
     72<td>Vector data registers</td>
    7373</tr>
    7474<tr>
     
    152152<td>40-47</td>
    153153<td>VDATA</td>
    154 <td>Vector data register</td>
     154<td>Vector data registers</td>
    155155</tr>
    156156<tr>
     
    182182requires 64-bit VADDR.</p>
    183183<p>The MTBUF instructions is executed in order. Any MTBUF instruction increments VMCNT and
    184 it decrements VMCNT after memory operation. Any memory-write operation incrments EXPCNT,
     184it decrements VMCNT after memory operation. Any memory-write operation increments EXPCNT,
    185185and it decrements EXPCNT after reading data from VDATA.</p>
    186186<h3>Instructions by opcode</h3>
    187 <p>List of the MUBUF instructions by opcode (GCN 1.0/1.1):</p>
     187<p>List of the MTBUF instructions by opcode (GCN 1.0/1.1):</p>
    188188<table>
    189189<thead>