Changes between Version 20 and Version 21 of GcnInstrsSop2
- Timestamp:
- 02/15/25 22:21:23 (4 weeks ago)
Legend:
- Unmodified
- Added
- Removed
- Modified
-
GcnInstrsSop2
v20 v21 526 526 <p>Opcode: 36 (0x24) for GCN 1.0/1.1; 34 (0x22) for GCN 1.2<br /> 527 527 Syntax: S_BFM_B32 SDST, SSRC0, SSRC1<br /> 528 Description: Make 32-bit bitmask from (SSRC1 & 31) bit that ha velength (SSRC0 & 31) and528 Description: Make 32-bit bitmask from (SSRC1 & 31) bit that has length (SSRC0 & 31) and 529 529 store it to SDST. SCC not touched.<br /> 530 530 Operation:<br /> … … 533 533 <p>Opcode: 37 (0x25) for GCN 1.0/1.1; 35 (0x23) for GCN 1.2<br /> 534 534 Syntax: S_BFM_B64 SDST(2), SSRC0, SSRC1<br /> 535 Description: Make 64-bit bitmask from (SSRC1 & 63) bit that ha velength (SSRC0 & 63) and535 Description: Make 64-bit bitmask from (SSRC1 & 63) bit that has length (SSRC0 & 63) and 536 536 store it to SDST. SCC not touched.<br /> 537 537 Operation:<br /> … … 545 545 Choose way that have smallest active threads and push data for second way to control stack 546 546 (EXEC mask, jump address). Control stack pointer is stored in CSP 547 (3 last bits in MODE register). One entry of the stack ha ve4 dwords.547 (3 last bits in MODE register). One entry of the stack has 4 dwords. 548 548 This instruction doesn't work if SSRC0 is immediate value.<br /> 549 549 Operation:<br />