Changes between Version 2 and Version 3 of GcnInstrsSop2


Ignore:
Timestamp:
Nov 13, 2015, 9:00:16 AM (5 years ago)
Author:
trac
Comment:

--

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  • GcnInstrsSop2

    v2 v3  
    144144<p><code>SDST = SSRC0 + SSRC1
    145145temp = (UINT64)SSRC0 + (UINT64)SSRC1
    146 SCC = temp&gt;((1LL&lt;&lt;31)-1) || temp&gt;(-1LL&lt;&lt;31)</code></p>
     146SCC = temp &gt; ((1LL&lt;&lt;31)-1) || temp &gt; (-1LL&lt;&lt;31)</code></p>
    147147<h4>S_ADD_U32</h4>
    148148<p>Opcode: 0 (0x0)<br />
     
    159159Operation:
    160160<code>SDST = SSRC0 &amp; SSRC1
    161 SCC = (SSRC0 &amp; SSRC1)!=0</code></p>
     161SCC = SDST!=0</code></p>
    162162<h4>S_AND_B64</h4>
    163163<p>Opcode: 15 (0xf)<br />
    164164Syntax: S_AND_B64 SDST(2), SSRC0(2), SSRC1(2)<br />
    165165Description: Do bitwise AND operation on SSRC0 and SSRC1 and store it to SDST, and store
    166 1 to SCC if result is not zero, otherwise store 0 to SCC.<br />
     1661 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
    167167Operation:
    168168<code>SDST = SSRC0 &amp; SSRC1
    169 SCC = (SSRC0 &amp; SSRC1)!=0</code></p>
     169SCC = SDST!=0</code></p>
    170170<h4>S_ANDN2_B32</h4>
    171171<p>Opcode: 20 (0x14)<br />
     
    175175Operation:
    176176<code>SDST = SSRC0 &amp; ~SSRC1
    177 SCC = (SSRC0 &amp; ~SSRC1)!=0</code></p>
     177SCC = SDST!=0</code></p>
    178178<h4>S_ANDN2_B64</h4>
    179179<p>Opcode: 21 (0x15)<br />
    180180Syntax: S_ANDN2_B64 SDST(2), SSRC0(2), SSRC1(2)<br />
    181181Description: Do bitwise AND operation on SSRC0 and bitwise negated SSRC1 and store
    182 it to SDST, and store 1 to SCC if result is not zero, otherwise store 0 to SCC.<br />
     182it to SDST, and store 1 to SCC if result is not zero, otherwise store 0 to SCC.
     183SDST, SSRC0, SSRC1 are 64-bit.<br />
    183184Operation:
    184185<code>SDST = SSRC0 &amp; ~SSRC1
    185 SCC = (SSRC0 &amp; ~SSRC1)!=0</code></p>
     186SCC = SDST!=0</code></p>
    186187<h4>S_CSELECT_B32</h4>
    187188<p>Opcode: 10 (0xa)<br />
     
    198199Operation:
    199200<code>SDST = SCC ? SSRC0 : SSRC1</code></p>
     201<h4>S_LSHL_B32</h4>
     202<p>Opcode: 30 (0x1e)
     203Syntax: S_LSHL_B32 SDST, SSRC0, SSRC1<br />
     204Description: Shift to left SSRC0 by (SSRC1&amp;31) bits and store result into SDST.
     205If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br />
     206Operation:<br />
     207<code>SDST = (SSRC0) &lt;&lt; (SSRC1 &amp; 31)
     208SCC = SDST!=0</code></p>
     209<h4>S_LSHL_B64</h4>
     210<p>Opcode: 31 (0x1f)
     211Syntax: S_LSHL_B64 SDST(2), SSRC0(2), SSRC1<br />
     212Description: Shift to left SSRC0 by (SSRC1&amp;31) bits and store result into SDST.
     213If result is non-zero store 1 to SCC, otherwise store 0 to SCC. SDST, SSRC0 are 64-bit,
     214SSRC1 is 32 bit.<br />
     215Operation:<br />
     216<code>SDST = (SSRC0) &lt;&lt; (SSRC1 &amp; 63)
     217SCC = SDST!=0</code></p>
    200218<h4>S_MIN_I32</h4>
    201219<p>Opcode: 6 (0x6)
     
    204222and store 1 to SCC if SSSRC0 value has been choosen, otherwise store 0 to SCC<br />
    205223Operation:<br />
    206 <code>SDST = (INT32)SSSRC0&lt;(INT32)SSSRC1 ? SSSRC0 : SSSRC1
    207 SCC = (INT32)SSSRC0&lt;(INT32)SSSRC1</code></p>
     224<code>SDST = (INT32)SSSRC0 &lt; (INT32)SSSRC1 ? SSSRC0 : SSSRC1
     225SCC = (INT32)SSSRC0 &lt; (INT32)SSSRC1</code></p>
    208226<h4>S_MIN_U32</h4>
    209227<p>Opcode: 7 (0x7)<br />
     
    212230and store 1 to SCC if SSSRC0 value has been choosen, otherwise store 0 to SCC<br />
    213231Operation:<br />
    214 <code>SDST = (UINT32)SSSRC0&lt;(UINT32)SSSRC1 ? SSSRC0 : SSSRC1
    215 SCC = (UINT32)SSSRC0&lt;(UINT32)SSSRC1</code></p>
     232<code>SDST = (UINT32)SSSRC0 &lt; (UINT32)SSSRC1 ? SSSRC0 : SSSRC1
     233SCC = (UINT32)SSSRC0 &lt; (UINT32)SSSRC1</code></p>
    216234<h4>S_MAX_I32</h4>
    217235<p>Opcode: 8 (0x9)
     
    220238and store 1 to SCC if SSSRC0 value has been choosen, otherwise store 0 to SCC<br />
    221239Operation:<br />
    222 <code>SDST = (INT32)SSSRC0&gt;(INT32)SSSRC1 ? SSSRC0 : SSSRC1
    223 SCC = (INT32)SSSRC0&gt;(INT32)SSSRC1</code></p>
     240<code>SDST = (INT32)SSSRC0 &gt; (INT32)SSSRC1 ? SSSRC0 : SSSRC1
     241SCC = (INT32)SSSRC0 &gt; (INT32)SSSRC1</code></p>
    224242<h4>S_MAX_U32</h4>
    225243<p>Opcode: 9 (0x9)<br />
     
    228246and store 1 to SCC if SSSRC0 value has been choosen, otherwise store 0 to SCC<br />
    229247Operation:<br />
    230 <code>SDST = (UINT32)SSSRC0&gt;(UINT32)SSSRC1 ? SSSRC0 : SSSRC1
    231 SCC = (UINT32)SSSRC0&gt;(UINT32)SSSRC1</code></p>
     248<code>SDST = (UINT32)SSSRC0 &gt; (UINT32)SSSRC1 ? SSSRC0 : SSSRC1
     249SCC = (UINT32)SSSRC0 &gt; (UINT32)SSSRC1</code></p>
     250<h4>S_NAND_B32</h4>
     251<p>Opcode: 24 (0x18)<br />
     252Syntax: S_NAND_B32 SDST, SSRC0, SSRC1<br />
     253Description: Do bitwise NAND operation on SSRC0 and SSRC1 and store it to SDST, and store
     2541 to SCC if result is not zero, otherwise store 0 to SCC.<br />
     255Operation:
     256<code>SDST = ~(SSRC0 &amp; SSRC1)
     257SCC = SDST!=0</code></p>
     258<h4>S_NAND_B64</h4>
     259<p>Opcode: 25 (0x19)<br />
     260Syntax: S_NAND_B64 SDST(2), SSRC0(2), SSRC1(2)<br />
     261Description: Do bitwise NAND operation on SSRC0 and SSRC1 and store it to SDST, and store
     2621 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
     263Operation:
     264<code>SDST = ~(SSRC0 &amp; SSRC1)
     265SCC = SDST!=0</code></p>
     266<h4>S_NOR_B32</h4>
     267<p>Opcode: 26 (0x1a)<br />
     268Syntax: S_NOR_B32 SDST, SSRC0, SSRC1<br />
     269Description: Do bitwise NOR operation on SSRC0 and SSRC1 and store it to SDST, and store
     2701 to SCC if result is not zero, otherwise store 0 to SCC.<br />
     271Operation:
     272<code>SDST = ~(SSRC0 | SSRC1)
     273SCC = SDST!=0</code></p>
     274<h4>S_NOR_B64</h4>
     275<p>Opcode: 27 (0x1b)<br />
     276Syntax: S_NOR_B64 SDST(2), SSRC0(2), SSRC1(2)<br />
     277Description: Do bitwise NOR operation on SSRC0 and SSRC1 and store it to SDST, and store
     2781 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
     279Operation:
     280<code>SDST = ~(SSRC0 | SSRC1)
     281SCC = SDST!=0</code></p>
    232282<h4>S_OR_B32</h4>
    233283<p>Opcode: 16 (0x10)<br />
     
    237287Operation:
    238288<code>SDST = SSRC0 | SSRC1
    239 SCC = (SSRC0 | SSRC1)!=0</code></p>
     289SCC = SDST!=0</code></p>
    240290<h4>S_OR_B64</h4>
    241291<p>Opcode: 17 (0x11)<br />
    242292Syntax: S_OR_B64 SDST(2), SSRC0(2), SSRC1(2)<br />
    243293Description: Do bitwise OR operation on SSRC0 and SSRC1 and store it to SDST, and store
    244 1 to SCC if result is not zero, otherwise store 0 to SCC.<br />
     2941 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
    245295Operation:
    246296<code>SDST = SSRC0 | SSRC1
    247 SCC = (SSRC0 | SSRC1)!=0</code></p>
     297SCC = SDST!=0</code></p>
    248298<h4>S_ORN2_B32</h4>
    249299<p>Opcode: 22 (0x16)<br />
     
    253303Operation:
    254304<code>SDST = SSRC0 | ~SSRC1
    255 SCC = (SSRC0 | ~SSRC1)!=0</code></p>
     305SCC = SDST!=0</code></p>
    256306<h4>S_ORN2_B64</h4>
    257307<p>Opcode: 23 (0x17)<br />
    258308Syntax: S_ORN2_B64 SDST(2), SSRC0(2), SSRC1(2)<br />
    259309Description: Do bitwise OR operation on SSRC0 and negated SSRC1 and store it to SDST,
    260 and store 1 to SCC if result is not zero, otherwise store 0 to SCC.<br />
     310and store 1 to SCC if result is not zero, otherwise store 0 to SCC.
     311SDST, SSRC0, SSRC1 are 64-bit.<br />
    261312Operation:
    262313<code>SDST = SSRC0 | ~SSRC1
    263 SCC = (SSRC0 | ~SSRC1)!=0</code></p>
     314SCC = SDST!=0</code></p>
    264315<h4>S_SUBB_U32</h4>
    265316<p>Opcode: 5 (0x5)<br />
     
    288339<code>SDST = SSRC0 - SSRC1
    289340SCC = ((INT64)SSRC0 - (INT64)SSRC1)&gt;&gt;32</code></p>
     341<h4>S_XNOR_B32</h4>
     342<p>Opcode: 28 (0x1c)<br />
     343Syntax: S_XNOR_B32 SDST, SSRC0, SSRC1<br />
     344Description: Do bitwise XNOR operation on SSRC0 and SSRC1 and store it to SDST, and store
     3451 to SCC if result is not zero, otherwise store 0 to SCC.<br />
     346Operation:
     347<code>SDST = ~(SSRC0 ^ SSRC1)
     348SCC = SDST!=0</code></p>
     349<h4>S_XNOR_B64</h4>
     350<p>Opcode: 29 (0x1d)<br />
     351Syntax: S_XNOR_B64 SDST(2), SSRC0(2), SSRC1(2)<br />
     352Description: Do bitwise XNOR operation on SSRC0 and SSRC1 and store it to SDST, and store
     3531 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
     354Operation:
     355<code>SDST = ~(SSRC0 ^ SSRC1)
     356SCC = SDST!=0</code></p>
    290357<h4>S_XOR_B32</h4>
    291358<p>Opcode: 18 (0x12)<br />
     
    295362Operation:<br />
    296363<code>SDST = SSRC0 ^ SSRC1
    297 SCC = (SSRC0 ^ SSRC1)!=0</code></p>
     364SCC = SDST!=0</code></p>
    298365<h4>S_XOR_B64</h4>
    299366<p>Opcode: 19 (0x13)<br />
    300367Syntax: S_XOR_B64 SDST(2), SSRC0(2), SSRC1(2)<br />
    301368Description: Do bitwise XOR operation on SSRC0 and SSRC1 and store it to SDST, and store
    302 1 to SCC if result is not zero, otherwise store 0 to SCC.<br />
     3691 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
    303370Operation:<br />
    304371<code>SDST = SSRC0 ^ SSRC1
    305 SCC = (SSRC0 ^ SSRC1)!=0</code></p>
     372SCC = SDST!=0</code></p>
    306373}}}