Changes between Version 3 and Version 4 of GcnInstrsSop2


Ignore:
Timestamp:
11/13/15 21:00:22 (8 years ago)
Author:
trac
Comment:

--

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  • GcnInstrsSop2

    v3 v4  
    141141Syntax: S_ADD_I32 SDST, SSRC0, SSRC1<br />
    142142Description: Add SSRC0 to SSRC1 and store result into SDST and store overflow flag into SCC.<br />
    143 Operation:  </p>
    144 <p><code>SDST = SSRC0 + SSRC1
     143Operation:<br />
     144<code>SDST = SSRC0 + SSRC1
    145145temp = (UINT64)SSRC0 + (UINT64)SSRC1
    146146SCC = temp &gt; ((1LL&lt;&lt;31)-1) || temp &gt; (-1LL&lt;&lt;31)</code></p>
     
    157157Description: Do bitwise AND operation on SSRC0 and SSRC1 and store it to SDST, and store
    1581581 to SCC if result is not zero, otherwise store 0 to SCC.<br />
    159 Operation:
     159Operation:<br />
    160160<code>SDST = SSRC0 &amp; SSRC1
    161161SCC = SDST!=0</code></p>
     
    165165Description: Do bitwise AND operation on SSRC0 and SSRC1 and store it to SDST, and store
    1661661 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
    167 Operation:
     167Operation:<br />
    168168<code>SDST = SSRC0 &amp; SSRC1
    169169SCC = SDST!=0</code></p>
     
    173173Description: Do bitwise AND operation on SSRC0 and negated SSRC1 and store it to SDST,
    174174and store 1 to SCC if result is not zero, otherwise store 0 to SCC.<br />
    175 Operation:
     175Operation:<br />
    176176<code>SDST = SSRC0 &amp; ~SSRC1
    177177SCC = SDST!=0</code></p>
     
    182182it to SDST, and store 1 to SCC if result is not zero, otherwise store 0 to SCC.
    183183SDST, SSRC0, SSRC1 are 64-bit.<br />
    184 Operation:
     184Operation:<br />
    185185<code>SDST = SSRC0 &amp; ~SSRC1
    186186SCC = SDST!=0</code></p>
     187<h4>S_ASHR_I32</h4>
     188<p>Opcode: 34 (0x22)
     189Syntax: S_ASHR_I32 SDST, SSRC0, SSRC1<br />
     190Description: Arithmetic shift to right SSRC0 by (SSRC1&amp;31) bits and store result into SDST.
     191If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br />
     192Operation:<br />
     193<code>SDST = (INT32)SSRC0 &gt;&gt; (SSRC1 &amp; 31)
     194SCC = SDST!=0</code></p>
     195<h4>S_ASHR_I64</h4>
     196<p>Opcode: 35 (0x23)<br />
     197Syntax: S_ASHR_I64 SDST(2), SSRC0(2), SSRC1<br />
     198Description: Arithmetic Shift to right SSRC0 by (SSRC1&amp;31) bits and store result into SDST.
     199If result is non-zero store 1 to SCC, otherwise store 0 to SCC. SDST, SSRC0 are 64-bit,
     200SSRC1 is 32 bit.<br />
     201Operation:<br />
     202<code>SDST = (INT64)SSRC0 &gt;&gt; (SSRC1 &amp; 63)
     203SCC = SDST!=0</code></p>
     204<h4>S_BFE_U32</h4>
     205<p>Opcode: 39 (0x27)<br />
     206Syntax: S_BFE_U32 SDST, SSRC0, SSRC1<br />
     207Description: Extracts bits in SSRC0 from range (SSRC1&amp;31) with length ((SSRC1&gt;&gt;16)&amp;0x7f).
     208If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br />
     209Operation:<br />
     210<code>shift = length &amp; 31
     211length = (SSRC1&gt;&gt;16) &amp; 0x7f
     212if (length==0)
     213    SDST = 0
     214if (shift+length &lt; 32)
     215    SDST = SSRC0 &lt;&lt; (32 - shift - length) &gt;&gt; (32 - length)
     216else
     217    SDST = SSRC0 &gt;&gt; shift
     218SCC = SDST!=0</code></p>
     219<h4>S_BFE_I32</h4>
     220<p>Opcode: 40 (0x28)<br />
     221Syntax: S_BFE_I32 SDST, SSRC0, SSRC1<br />
     222Description: Extracts bits in SSRC0 from range (SSRC1&amp;31) with length ((SSRC1&gt;&gt;16)&amp;0x7f)
     223and extend sign from last bit of extracted value.
     224If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br />
     225Operation:<br />
     226<code>shift = length&amp;31
     227length = (SSRC1&gt;&gt;16) &amp; 0x7f
     228if (length==0)
     229    SDST = 0
     230if (shift+length &lt; 32)
     231    SDST = (INT32)(SSRC0 &lt;&lt; (32 - shift - length)) &gt;&gt; (32 - length)
     232else
     233    SDST = (INT32)SSRC0 &gt;&gt; shift
     234SCC = SDST!=0</code></p>
     235<h4>S_BFM_B32</h4>
     236<p>Opcode: 36 (0x24)
     237Syntax: S_BFM_B32 SDST, SSRC0, SSRC1<br />
     238Description: Make 32-bit bitmask from (SSRC1 &amp; 31) bit that have length (SSRC0 &amp; 31) and
     239store it to SDST. SCC not touched.<br />
     240Operation:<br />
     241<code>SDST = ((1U &lt;&lt; (SSRC0&amp;31))-1) &lt;&lt; (SSRC1&amp;31)</code></p>
     242<h4>S_BFM_B64</h4>
     243<p>Opcode: 37 (0x25)
     244Syntax: S_BFM_B64 SDST(2), SSRC0, SSRC1<br />
     245Description: Make 64-bit bitmask from (SSRC1 &amp; 63) bit that have length (SSRC0 &amp; 63) and
     246store it to SDST. SCC not touched.<br />
     247Operation:<br />
     248<code>SDST = ((1ULL &lt;&lt; (SSRC0&amp;63))-1) &lt;&lt; (SSRC1&amp;63)</code></p>
    187249<h4>S_CSELECT_B32</h4>
    188250<p>Opcode: 10 (0xa)<br />
     
    190252Description: If SCC is 1 then store SSRC0 into SDST, otherwise store SSRC1 into SDST.
    191253SCC has not been changed.<br />
    192 Operation:
     254Operation:<br />
    193255<code>SDST = SCC ? SSRC0 : SSRC1</code></p>
    194256<h4>S_CSELECT_B64</h4>
     
    197259Description: If SCC is 1 then store 64-bit SSRC0 into SDST, otherwise store
    19826064-bit SSRC1 into SDST. SCC has not been changed.<br />
    199 Operation:
     261Operation:<br />
    200262<code>SDST = SCC ? SSRC0 : SSRC1</code></p>
    201263<h4>S_LSHL_B32</h4>
     
    205267If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br />
    206268Operation:<br />
    207 <code>SDST = (SSRC0) &lt;&lt; (SSRC1 &amp; 31)
     269<code>SDST = SSRC0 &lt;&lt; (SSRC1 &amp; 31)
    208270SCC = SDST!=0</code></p>
    209271<h4>S_LSHL_B64</h4>
     
    214276SSRC1 is 32 bit.<br />
    215277Operation:<br />
    216 <code>SDST = (SSRC0) &lt;&lt; (SSRC1 &amp; 63)
    217 SCC = SDST!=0</code></p>
     278<code>SDST = SSRC0 &lt;&lt; (SSRC1 &amp; 63)
     279SCC = SDST!=0</code></p>
     280<h4>S_LSHR_B32</h4>
     281<p>Opcode: 32 (0x20)
     282Syntax: S_LSHR_B32 SDST, SSRC0, SSRC1<br />
     283Description: Shift to right SSRC0 by (SSRC1&amp;31) bits and store result into SDST.
     284If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br />
     285Operation:<br />
     286<code>SDST = SSRC0 &gt;&gt; (SSRC1 &amp; 31)
     287SCC = SDST!=0</code></p>
     288<h4>S_LSHR_B64</h4>
     289<p>Opcode: 33 (0x21)
     290Syntax: S_LSHR_B64 SDST(2), SSRC0(2), SSRC1<br />
     291Description: Shift to right SSRC0 by (SSRC1&amp;31) bits and store result into SDST.
     292If result is non-zero store 1 to SCC, otherwise store 0 to SCC. SDST, SSRC0 are 64-bit,
     293SSRC1 is 32 bit.<br />
     294Operation:<br />
     295<code>SDST = SSRC0 &gt;&gt; (SSRC1 &amp; 63)
     296SCC = SDST!=0</code></p>
     297<h4>S_MAX_I32</h4>
     298<p>Opcode: 8 (0x9)
     299Syntax: S_MIN_I32 SDST, SSRC0, SSRC1<br />
     300Description: Choose largest signed value value from SSRC0 and SSRC1 and store its into SDST,
     301and store 1 to SCC if SSSRC0 value has been choosen, otherwise store 0 to SCC<br />
     302Operation:<br />
     303<code>SDST = (INT32)SSSRC0 &gt; (INT32)SSSRC1 ? SSSRC0 : SSSRC1
     304SCC = (INT32)SSSRC0 &gt; (INT32)SSSRC1</code></p>
     305<h4>S_MAX_U32</h4>
     306<p>Opcode: 9 (0x9)<br />
     307Syntax: S_MAX_U32 SDST, SSRC0, SSRC1<br />
     308Description: Choose largest unsigned value value from SSRC0 and SSRC1 and store its into SDST,
     309and store 1 to SCC if SSSRC0 value has been choosen, otherwise store 0 to SCC<br />
     310Operation:<br />
     311<code>SDST = (UINT32)SSSRC0 &gt; (UINT32)SSSRC1 ? SSSRC0 : SSSRC1
     312SCC = (UINT32)SSSRC0 &gt; (UINT32)SSSRC1</code></p>
    218313<h4>S_MIN_I32</h4>
    219314<p>Opcode: 6 (0x6)
     
    232327<code>SDST = (UINT32)SSSRC0 &lt; (UINT32)SSSRC1 ? SSSRC0 : SSSRC1
    233328SCC = (UINT32)SSSRC0 &lt; (UINT32)SSSRC1</code></p>
    234 <h4>S_MAX_I32</h4>
    235 <p>Opcode: 8 (0x9)
    236 Syntax: S_MIN_I32 SDST, SSRC0, SSRC1<br />
    237 Description: Choose largest signed value value from SSRC0 and SSRC1 and store its into SDST,
    238 and store 1 to SCC if SSSRC0 value has been choosen, otherwise store 0 to SCC<br />
    239 Operation:<br />
    240 <code>SDST = (INT32)SSSRC0 &gt; (INT32)SSSRC1 ? SSSRC0 : SSSRC1
    241 SCC = (INT32)SSSRC0 &gt; (INT32)SSSRC1</code></p>
    242 <h4>S_MAX_U32</h4>
    243 <p>Opcode: 9 (0x9)<br />
    244 Syntax: S_MAX_U32 SDST, SSRC0, SSRC1<br />
    245 Description: Choose largest unsigned value value from SSRC0 and SSRC1 and store its into SDST,
    246 and store 1 to SCC if SSSRC0 value has been choosen, otherwise store 0 to SCC<br />
    247 Operation:<br />
    248 <code>SDST = (UINT32)SSSRC0 &gt; (UINT32)SSSRC1 ? SSSRC0 : SSSRC1
    249 SCC = (UINT32)SSSRC0 &gt; (UINT32)SSSRC1</code></p>
     329<h4>S_MUL_I32</h4>
     330<p>Opcode: 38 (0x26)
     331Syntax: S_MUL_I32 SDST, SSRC0, SSRC1
     332Description: Multiply SSRC0 and SSRC1 and store result into SDST. Do not change SCC.<br />
     333Operation:<br />
     334<code>SDST = SSRC0 * SSRC1</code></p>
    250335<h4>S_NAND_B32</h4>
    251336<p>Opcode: 24 (0x18)<br />
     
    253338Description: Do bitwise NAND operation on SSRC0 and SSRC1 and store it to SDST, and store
    2543391 to SCC if result is not zero, otherwise store 0 to SCC.<br />
    255 Operation:
     340Operation:<br />
    256341<code>SDST = ~(SSRC0 &amp; SSRC1)
    257342SCC = SDST!=0</code></p>
     
    261346Description: Do bitwise NAND operation on SSRC0 and SSRC1 and store it to SDST, and store
    2623471 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
    263 Operation:
     348Operation:<br />
    264349<code>SDST = ~(SSRC0 &amp; SSRC1)
    265350SCC = SDST!=0</code></p>
     
    269354Description: Do bitwise NOR operation on SSRC0 and SSRC1 and store it to SDST, and store
    2703551 to SCC if result is not zero, otherwise store 0 to SCC.<br />
    271 Operation:
     356Operation:<br />
    272357<code>SDST = ~(SSRC0 | SSRC1)
    273358SCC = SDST!=0</code></p>
     
    277362Description: Do bitwise NOR operation on SSRC0 and SSRC1 and store it to SDST, and store
    2783631 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
    279 Operation:
     364Operation:<br />
    280365<code>SDST = ~(SSRC0 | SSRC1)
    281366SCC = SDST!=0</code></p>
     
    285370Description: Do bitwise OR operation on SSRC0 and SSRC1 and store it to SDST, and store
    2863711 to SCC if result is not zero, otherwise store 0 to SCC.<br />
    287 Operation:
     372Operation:<br />
    288373<code>SDST = SSRC0 | SSRC1
    289374SCC = SDST!=0</code></p>
     
    293378Description: Do bitwise OR operation on SSRC0 and SSRC1 and store it to SDST, and store
    2943791 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
    295 Operation:
     380Operation:<br />
    296381<code>SDST = SSRC0 | SSRC1
    297382SCC = SDST!=0</code></p>
     
    301386Description: Do bitwise OR operation on SSRC0 and negated SSRC1 and store it to SDST,
    302387and store 1 to SCC if result is not zero, otherwise store 0 to SCC.<br />
    303 Operation:
     388Operation:<br />
    304389<code>SDST = SSRC0 | ~SSRC1
    305390SCC = SDST!=0</code></p>
     
    310395and store 1 to SCC if result is not zero, otherwise store 0 to SCC.
    311396SDST, SSRC0, SSRC1 are 64-bit.<br />
    312 Operation:
     397Operation:<br />
    313398<code>SDST = SSRC0 | ~SSRC1
    314399SCC = SDST!=0</code></p>
     
    344429Description: Do bitwise XNOR operation on SSRC0 and SSRC1 and store it to SDST, and store
    3454301 to SCC if result is not zero, otherwise store 0 to SCC.<br />
    346 Operation:
     431Operation:<br />
    347432<code>SDST = ~(SSRC0 ^ SSRC1)
    348433SCC = SDST!=0</code></p>
     
    352437Description: Do bitwise XNOR operation on SSRC0 and SSRC1 and store it to SDST, and store
    3534381 to SCC if result is not zero, otherwise store 0 to SCC. SDST, SSRC0, SSRC1 are 64-bit.<br />
    354 Operation:
     439Operation:<br />
    355440<code>SDST = ~(SSRC0 ^ SSRC1)
    356441SCC = SDST!=0</code></p>