Changes between Version 8 and Version 9 of GcnInstrsSop2


Ignore:
Timestamp:
Nov 14, 2015, 2:00:27 PM (5 years ago)
Author:
trac
Comment:

--

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  • GcnInstrsSop2

    v8 v9  
    4141</tbody>
    4242</table>
    43 <p>Syntax for all instructions: INSTRUCTION SDST, SSRC0, SSRC1</p>
     43<p>Syntax for almost instructions: INSTRUCTION SDST, SSRC0, SSRC1</p>
    4444<p>Example: s_and_b32 s0, s1, s2</p>
    4545<p>List of the instructions by opcode:</p>
     
    372372If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br />
    373373Operation:<br />
    374 <code>UINT8 shift = SSRC1&amp;31
     374<code>UINT8 shift = SSRC1 &amp; 31
    375375UINT8 length = (SSRC1&gt;&gt;16) &amp; 0x7f
    376376if (length==0)
     
    380380else
    381381    SDST = (INT32)SSRC0 &gt;&gt; shift
     382SCC = SDST!=0</code></p>
     383<h4>S_BFE_I64</h4>
     384<p>Opcode: 42 (0x2a) for GCN 1.0/1.1; 40 (0x28) for GCN 1.2<br />
     385Syntax: S_BFE_I64 SDST, SSRC0, SSRC1<br />
     386Description: Extracts bits in SSRC0 from range (SSRC1&amp;63) with length ((SSRC1&gt;&gt;16)&amp;0x7f)
     387and extend sign from last bit of extracted value.
     388If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br />
     389Operation:<br />
     390<code>UINT8 shift = SSRC1 &amp; 63
     391UINT8 length = (SSRC1&gt;&gt;16) &amp; 0x7f
     392if (length==0)
     393    SDST = 0
     394if (shift+length &lt; 64)
     395    SDST = (INT64)(SSRC0 &lt;&lt; (64 - shift - length)) &gt;&gt; (64 - length)
     396else
     397    SDST = (INT64)SSRC0 &gt;&gt; shift
    382398SCC = SDST!=0</code></p>
    383399<h4>S_BFE_U32</h4>
     
    396412    SDST = SSRC0 &gt;&gt; shift
    397413SCC = SDST!=0</code></p>
    398 <h4>S_BFE_I64</h4>
    399 <p>Opcode: 42 (0x2a) for GCN 1.0/1.1; 40 (0x28) for GCN 1.2<br />
    400 Syntax: S_BFE_I64 SDST, SSRC0, SSRC1<br />
    401 Description: Extracts bits in SSRC0 from range (SSRC1&amp;63) with length ((SSRC1&gt;&gt;16)&amp;0x7f)
    402 and extend sign from last bit of extracted value.
    403 If result is non-zero store 1 to SCC, otherwise store 0 to SCC.<br />
    404 Operation:<br />
    405 <code>UINT8 shift = SSRC1&amp;63
    406 UINT8 length = (SSRC1&gt;&gt;16) &amp; 0x7f
    407 if (length==0)
    408     SDST = 0
    409 if (shift+length &lt; 64)
    410     SDST = (INT64)(SSRC0 &lt;&lt; (64 - shift - length)) &gt;&gt; (64 - length)
    411 else
    412     SDST = (INT64)SSRC0 &gt;&gt; shift
    413 SCC = SDST!=0</code></p>
    414414<h4>S_BFE_U64</h4>
    415415<p>Opcode: 41 (0x29) for GCN 1.0/1.1; 39 (0x27) for GCN 1.2<br />
     
    442442Operation:<br />
    443443<code>SDST = ((1ULL &lt;&lt; (SSRC0&amp;63))-1) &lt;&lt; (SSRC1&amp;63)</code></p>
     444<h4>S_CBRANCH_G_FORK</h4>
     445<p>Opcode: 43 (0x2b) for GCN 1.0/1.1; 41 (0x29) for GCN 1.2<br />
     446Syntax: S_CBRANCH_G_FORK SSRC0(2), SSRC1(2)<br />
     447Description: Fork control flow to passed and failed condition, jump to address SSRC1 for
     448passed conditions. Make two masks: for passed conditions (EXEC &amp; SSRC0),
     449for failed conditions: (EXEC &amp; ~SSRC0).
     450Choose way that have smallest active threads and push data for second way to control stack
     451(EXEC mask, jump address). Control stack pointer is stored in CSP
     452(3 last bits in MODE register). One entry of the stack have 4 dwords.
     453This instruction doesn't work if SSRC0 is immediate value.<br />
     454Operation:<br />
     455<code>UINT64 passes = (EXEC &amp; SSRC0)
     456UINT64 failures = (EXEC &amp; ~SSRC0)
     457if (passes == EXEC)
     458    PC = SSRC1
     459else if (failures == EXEC)
     460    PC += 4
     461else if (BITCOUNT(failures) &lt; BITCOUNT(passes)) {
     462    EXEC = failures
     463    SGPR[CSP*4:CSP*4+1] = passes
     464    SGPR[CSP*4+2:CSP*4+3] = SSRC1
     465    CSP++
     466    PC += 4 /* jump to failure */
     467} else {
     468    EXEC = passes
     469    SGPR[CSP*4:CSP*4+1] = failures
     470    SGPR[CSP*4+2:CSP*4+3] = PC+4
     471    CSP++
     472    PC = SSRC1  /* jump to passes */
     473}</code></p>
    444474<h4>S_CSELECT_B32</h4>
    445475<p>Opcode: 10 (0xa)<br />