Changes between Initial Version and Version 1 of GcnInstrsSopc


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Timestamp:
11/16/15 20:00:21 (8 years ago)
Author:
trac
Comment:

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  • GcnInstrsSopc

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     1[wiki:ClrxToc Back to Table of content]
     2{{{
     3#!html
     4<h2>GCN ISA SOPC instructions</h2>
     5<p>The basic encoding of the SOPC instructions needs 4 bytes (dword). List of fields:</p>
     6<table>
     7<thead>
     8<tr>
     9<th>Bits</th>
     10<th>Name</th>
     11<th>Description</th>
     12</tr>
     13</thead>
     14<tbody>
     15<tr>
     16<td>0-7</td>
     17<td>SSRC0</td>
     18<td>First scalar source operand. Refer to operand encoding</td>
     19</tr>
     20<tr>
     21<td>8-15</td>
     22<td>SSRC1</td>
     23<td>Second scalar source operand. Refer to operand encoding</td>
     24</tr>
     25<tr>
     26<td>16-22</td>
     27<td>OPCODE</td>
     28<td>Operation code</td>
     29</tr>
     30<tr>
     31<td>23-31</td>
     32<td>ENCODING</td>
     33<td>Encoding type. Must be 0b101111110</td>
     34</tr>
     35</tbody>
     36</table>
     37<p>Syntax for almost instructions: INSTRUCTION SSRC0, SSRC1</p>
     38<p>Example: s_cmp_eq_i32 s0, s1</p>
     39<p>List of the instructions by opcode:</p>
     40<table>
     41<thead>
     42<tr>
     43<th>Opcode</th>
     44<th>Mnemonic (GCN1.0/1.1)</th>
     45<th>Mnemonic (GCN 1.2)</th>
     46</tr>
     47</thead>
     48<tbody>
     49<tr>
     50<td>0 (0x0)</td>
     51<td>S_CMP_EQ_I32</td>
     52<td>S_CMP_EQ_I32</td>
     53</tr>
     54<tr>
     55<td>1 (0x1)</td>
     56<td>S_CMP_LG_I32</td>
     57<td>S_CMP_LG_I32</td>
     58</tr>
     59<tr>
     60<td>2 (0x2)</td>
     61<td>S_CMP_GT_I32</td>
     62<td>S_CMP_GT_I32</td>
     63</tr>
     64<tr>
     65<td>3 (0x3)</td>
     66<td>S_CMP_GE_I32</td>
     67<td>S_CMP_GE_I32</td>
     68</tr>
     69<tr>
     70<td>4 (0x4)</td>
     71<td>S_CMP_LT_I32</td>
     72<td>S_CMP_LT_I32</td>
     73</tr>
     74<tr>
     75<td>5 (0x5)</td>
     76<td>S_CMP_LE_I32</td>
     77<td>S_CMP_LE_I32</td>
     78</tr>
     79<tr>
     80<td>6 (0x6)</td>
     81<td>S_CMP_EQ_U32</td>
     82<td>S_CMP_EQ_U32</td>
     83</tr>
     84<tr>
     85<td>7 (0x7)</td>
     86<td>S_CMP_LG_U32</td>
     87<td>S_CMP_LG_U32</td>
     88</tr>
     89<tr>
     90<td>8 (0x8)</td>
     91<td>S_CMP_GT_U32</td>
     92<td>S_CMP_GT_U32</td>
     93</tr>
     94<tr>
     95<td>9 (0x9)</td>
     96<td>S_CMP_GE_U32</td>
     97<td>S_CMP_GE_U32</td>
     98</tr>
     99<tr>
     100<td>10 (0xa)</td>
     101<td>S_CMP_LT_U32</td>
     102<td>S_CMP_LT_U32</td>
     103</tr>
     104<tr>
     105<td>11 (0xb)</td>
     106<td>S_CMP_LE_U32</td>
     107<td>S_CMP_LE_U32</td>
     108</tr>
     109<tr>
     110<td>12 (0xc)</td>
     111<td>S_BITCMP0_B32</td>
     112<td>S_BITCMP0_B32</td>
     113</tr>
     114<tr>
     115<td>13 (0xd)</td>
     116<td>S_BITCMP1_B32</td>
     117<td>S_BITCMP1_B32</td>
     118</tr>
     119<tr>
     120<td>14 (0xe)</td>
     121<td>S_BITCMP0_B64</td>
     122<td>S_BITCMP0_B64</td>
     123</tr>
     124<tr>
     125<td>15 (0xf)</td>
     126<td>S_BITCMP1_B64</td>
     127<td>S_BITCMP1_B64</td>
     128</tr>
     129<tr>
     130<td>16 (0x10)</td>
     131<td>S_SETVSKIP</td>
     132<td>S_SETVSKIP</td>
     133</tr>
     134<tr>
     135<td>17 (0x11)</td>
     136<td>--</td>
     137<td>S_SET_GPR_IDX_ON</td>
     138</tr>
     139<tr>
     140<td>18 (0x12)</td>
     141<td>--</td>
     142<td>S_CMP_EQ_U64</td>
     143</tr>
     144<tr>
     145<td>19 (0x13)</td>
     146<td>--</td>
     147<td>S_CMP_LG_U64, S_CMP_NE_U64</td>
     148</tr>
     149</tbody>
     150</table>
     151<h3>Instruction set</h3>
     152<p>Alphabetically sorted instruction list:</p>
     153<h4>S_BITCMP0_B32</h4>
     154<p>Opcode: 12 (0xc)<br />
     155Syntax: S_BITCMP0_B32 SSRC0, SSRC1<br />
     156Description: Test bit in SSRC0 with specified number (SSRC1&amp;31) and if bit is clear,
     157store 1 to SCC, otherwise store 0 to SCC.<br />
     158Operation:<br />
     159<code>SCC = (SSRC0 &amp; (1U &lt;&lt; (SSRC1&amp;31))) == 0</code></p>
     160<h4>S_BITCMP0_B64</h4>
     161<p>Opcode: 14 (0xe)<br />
     162Syntax: S_BITCMP0_B64 SSRC0(2), SSRC1<br />
     163Description: Test bit in SSRC0 with specified number (SSRC1&amp;63) and if bit is clear,
     164store 1 to SCC, otherwise store 0 to SCC.<br />
     165Operation:<br />
     166<code>SCC = (SSRC0 &amp; (1ULL &lt;&lt; (SSRC1&amp;63))) == 0</code></p>
     167<h4>S_BITCMP1_B32</h4>
     168<p>Opcode: 13 (0xd)<br />
     169Syntax: S_BITCMP1_B32 SSRC0, SSRC1<br />
     170Description: Test bit in SSRC0 with specified number (SSRC1&amp;31) and if bit is set,
     171store 1 to SCC, otherwise store 0 to SCC.<br />
     172Operation:<br />
     173<code>SCC = (SSRC0 &amp; (1U &lt;&lt; (SSRC1&amp;31))) != 0</code></p>
     174<h4>S_BITCMP1_B64</h4>
     175<p>Opcode: 15 (0xf)<br />
     176Syntax: S_BITCMP1_B64 SSRC0(2), SSRC1<br />
     177Description: Test bit in SSRC0 with specified number (SSRC1&amp;63) and if bit is set,
     178store 1 to SCC, otherwise store 0 to SCC.<br />
     179Operation:<br />
     180<code>SCC = (SSRC0 &amp; (1ULL &lt;&lt; (SSRC1&amp;63))) != 0</code></p>
     181<h4>S_CMP_EQ_I32</h4>
     182<p>Opcode: 0 (0x0)<br />
     183Syntax: S_CMP_EQ_I32 SSRC0, SSRC1<br />
     184Description: Compare SSRC0 to SSRC1. If SSRC0 and SSRC1 are equal, store 1 to SCC,
     185otherwise store 0 to SCC.<br />
     186Operation:<br />
     187<code>SCC = SSRC0==SSRC1</code></p>
     188<h4>S_CMP_EQ_U32</h4>
     189<p>Opcode: 6 (0x6)<br />
     190Syntax: S_CMP_EQ_U32 SSRC0, SSRC1<br />
     191Description: Compare SSRC0 to SSRC1. If SSRC0 and SSRC1 are equal, store 1 to SCC,
     192otherwise store 0 to SCC.<br />
     193Operation:<br />
     194<code>SCC = SSRC0==SSRC1</code></p>
     195<h4>S_CMP_EQ_U64</h4>
     196<p>Opcode: 18 (0x12) for GCN 1.2<br />
     197Syntax: S_CMP_EQ_U64 SSRC0(2), SSRC1(2)<br />
     198Description: Compare SSRC0 to SSRC1. If SSRC0 and SSRC1 are equal, store 1 to SCC,
     199otherwise store 0 to SCC. SSRC0 and SSRC1 are 64-bit.<br />
     200Operation:<br />
     201<code>SCC = SSRC0==SSRC1</code></p>
     202<h4>S_CMP_GE_I32</h4>
     203<p>Opcode: 3 (0x3)<br />
     204Syntax: S_CMP_GE_I32 SSRC0, SSRC1<br />
     205Description: Compare signed SSRC0 to signed SSRC1.
     206If SSRC0 greater or equal to than SSRC1, store 1 to SCC, otherwise store 0 to SCC.<br />
     207Operation:<br />
     208<code>SCC = (INT32)SSRC0 &gt;= (INT32)SSRC1</code></p>
     209<h4>S_CMP_GE_U32</h4>
     210<p>Opcode: 9 (0x9)<br />
     211Syntax: S_CMP_GE_U32 SSRC0, SSRC1<br />
     212Description: Compare unsigned SSRC0 to unsigned SSRC1.
     213If SSRC0 greater or equal to than SSRC1, store 1 to SCC, otherwise store 0 to SCC.<br />
     214Operation:<br />
     215<code>SCC = SSRC0 &gt;= SSRC1</code></p>
     216<h4>S_CMP_GT_I32</h4>
     217<p>Opcode: 2 (0x2)<br />
     218Syntax: S_CMP_GT_I32 SSRC0, SSRC1<br />
     219Description: Compare signed SSRC0 to signed SSRC1.
     220If SSRC0 greater than SSRC1, store 1 to SCC, otherwise store 0 to SCC.<br />
     221Operation:<br />
     222<code>SCC = (INT32)SSRC0 &gt; (INT32)SSRC1</code></p>
     223<h4>S_CMP_GT_U32</h4>
     224<p>Opcode: 8 (0x8)<br />
     225Syntax: S_CMP_GT_U32 SSRC0, SSRC1<br />
     226Description: Compare unssigned SSRC0 to unsigned SSRC1.
     227If SSRC0 greater than SSRC1, store 1 to SCC, otherwise store 0 to SCC.<br />
     228Operation:<br />
     229<code>SCC = SSRC0 &gt; SSRC1</code></p>
     230<h4>S_CMP_LE_I32</h4>
     231<p>Opcode: 5 (0x5)<br />
     232Syntax: S_CMP_LE_I32 SSRC0, SSRC1<br />
     233Description: Compare signed SSRC0 to signed SSRC1.
     234If SSRC0 less or equal to than SSRC1, store 1 to SCC, otherwise store 0 to SCC.<br />
     235Operation:<br />
     236<code>SCC = (INT32)SSRC0 &lt;= (INT32)SSRC1</code></p>
     237<h4>S_CMP_LE_U32</h4>
     238<p>Opcode: 11 (0xb)<br />
     239Syntax: S_CMP_LE_U32 SSRC0, SSRC1<br />
     240Description: Compare unsigned SSRC0 to unsigned SSRC1.
     241If SSRC0 less or equal to than SSRC1, store 1 to SCC, otherwise store 0 to SCC.<br />
     242Operation:<br />
     243<code>SCC = SSRC0 &lt;= SSRC1</code></p>
     244<h4>S_CMP_LG_I32</h4>
     245<p>Opcode: 1 (0x1)<br />
     246Syntax: S_CMP_LG_I32 SSRC0, SSRC1<br />
     247Description: Compare SSRC0 to SSRC1. If SSRC0 and SSRC1 are not equal, store 1 to SCC,
     248otherwise store 0 to SCC.<br />
     249Operation:<br />
     250<code>SCC = SSRC0!=SSRC1</code></p>
     251<h4>S_CMP_LG_U32</h4>
     252<p>Opcode: 7 (0x7)<br />
     253Syntax: S_CMP_LG_I32 SSRC0, SSRC1<br />
     254Description: Compare SSRC0 to SSRC1. If SSRC0 and SSRC1 are not equal, store 1 to SCC,
     255otherwise store 0 to SCC.<br />
     256Operation:<br />
     257<code>SCC = SSRC0!=SSRC1</code></p>
     258<h4>S_CMP_LG_U64, S_CMP_NE_U64</h4>
     259<p>Opcode: 19 (0x13) for GCN 1.2<br />
     260Syntax: S_CMP_LG_U64 SSRC0(2), SSRC1(2)<br />
     261Syntax: S_CMP_NE_U64 SSRC0(2), SSRC1(2)<br />
     262Description: Compare SSRC0 to SSRC1. If SSRC0 and SSRC1 are equal, store 1 to SCC,
     263otherwise store 0 to SCC. SSRC0 and SSRC1 are 64-bit.<br />
     264Operation:<br />
     265<code>SCC = SSRC0!=SSRC1</code></p>
     266<h4>S_CMP_LT_I32</h4>
     267<p>Opcode: 4 (0x4)<br />
     268Syntax: S_CMP_LT_I32 SSRC0, SSRC1<br />
     269Description: Compare signed SSRC0 to signed SSRC1.
     270If SSRC0 less than SSRC1, store 1 to SCC, otherwise store 0 to SCC.<br />
     271Operation:<br />
     272<code>SCC = (INT32)SSRC0 &lt; (INT32)SSRC1</code></p>
     273<h4>S_CMP_LT_U32</h4>
     274<p>Opcode: 10 (0xa)<br />
     275Syntax: S_CMP_LT_U32 SSRC0, SSRC1<br />
     276Description: Compare unsigned SSRC0 to unsigned SSRC1.
     277If SSRC0 less than SSRC1, store 1 to SCC, otherwise store 0 to SCC.<br />
     278Operation:<br />
     279<code>SCC = SSRC0 &lt; SSRC1</code></p>
     280<h4>S_SETVSKIP</h4>
     281<p>Opcode: 16 (0x10)<br />
     282Syntax: S_SETVSKIP SSRC0, SSRC1<br />
     283Description: If bit in SSRC0 with specified number (SSRC1&amp;31) is set enable VSKIP mode
     284(skip all vector instructions), otherwise disable VSKIP mode.<br />
     285Operation:<br />
     286<code>VSKIP = (SSRC0 &amp; 1&lt;&lt;(SSRC1&amp;31)) != 0</code></p>
     287}}}