Changes between Version 1 and Version 2 of GcnInstrsSopk


Ignore:
Timestamp:
Nov 14, 2015, 8:00:20 PM (5 years ago)
Author:
trac
Comment:

--

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  • GcnInstrsSopk

    v1 v2  
    3636</table>
    3737<p>Syntax for almost instructions: INSTRUCTION SDST, SIMM16</p>
    38 <p>SIMM16 - signed 16-bit immediate. IMM16 - unsigned 16-bit immediate.</p>
     38<p>SIMM16 - signed 16-bit immediate. IMM16 - unsigned 16-bit immediate.<br />
     39RELADDR - relative offset to this instruction (can be label or relative expresion).
     40RELADDR = NEXTPC + SIMM16, NEXTPC - PC for next instruction.</p>
    3941<p>List of the instructions by opcode:</p>
    4042<table>
     
    170172INT64 temp = SEXT64(SDST) + SEXT64(SIMM16)
    171173SCC = temp &gt; ((1LL&lt;&lt;31)-1) || temp &lt; (-1LL&lt;&lt;31)</code></p>
     174<h4>S_CBRANCH_I_FORK</h4>
     175<p>Opcode: 17 (0x11) for GCN 1.0/1.1; 16 (0x10) for GCN 1.2<br />
     176Syntax: S_CBRANCH_I_FORK SSRC0(2), RELADDR<br />
     177Description: Fork control flow to passed and failed condition, jump to address RELADDR for
     178passed conditions. Make two masks: for passed conditions (EXEC &amp; SSRC0),
     179for failed conditions: (EXEC &amp; ~SSRC0).
     180Choose way that have smallest active threads and push data for second way to control stack
     181(EXEC mask, jump address). Control stack pointer is stored in CSP
     182(3 last bits in MODE register). One entry of the stack have 4 dwords.
     183This instruction doesn't work if SSRC0 is immediate value.<br />
     184Operation:<br />
     185<code>UINT64 passes = (EXEC &amp; SSRC0)
     186UINT64 failures = (EXEC &amp; ~SSRC0)
     187if (passes == EXEC)
     188    PC = SSRC1
     189else if (failures == EXEC)
     190    PC += 4
     191else if (BITCOUNT(failures) &lt; BITCOUNT(passes)) {
     192    EXEC = failures
     193    SGPR[CSP*4:CSP*4+1] = passes
     194    SGPR[CSP*4+2:CSP*4+3] = RELADDR
     195    CSP++
     196    PC += 4 /* jump to failure */
     197} else {
     198    EXEC = passes
     199    SGPR[CSP*4:CSP*4+1] = failures
     200    SGPR[CSP*4+2:CSP*4+3] = PC+4
     201    CSP++
     202    PC = RELADDR /* jump to passes */
     203}</code></p>
    172204<h4>S_CMOVK_I32</h4>
    173205<p>Opcode: 2 (0x2) for GCN 1.0/1.1; 1 (0x1) for GCN 1.2<br />
     
    267299Operation:<br />
    268300<code>SCC = SIMM16</code></p>
    269 <h4>S_MUL_I32</h4>
     301<h4>S_MULK_I32</h4>
    270302<p>Opcode: 16 (0x10) for GCN 1.0/1.1; 15 (0xf) for GCN 1.2<br />
    271303Syntax: S_MULK_I32 SDST, SIMM16<br />